Method for pulse-based convolution for near-sensor processing
AssigneeUniversity of Louisiana at Lafayette
InventorsMohammad Hassan Najafi, S. Rasoul Faraji, Kiarash Bazargan, David Lilja
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Abstract
Disclosed herein is a low-cost, high-performance, and energy-efficient near-sensor convolution engine based on pulsed unary processing. The disclosed engine removes the necessity of using costly analog-to-digital converters. Synthesis results show that the proposed pulse-based design significantly improves the hardware cost and energy consumption compared to the conventional fixed-point binary and also to the stochastic computing-based designs.
Claims17
An N×N bipolar near-sensor convolutional engine comprising:
- two or more pulse width modulation (PWM) signal generators, comprising two or more inputs;
- two or more AND gates comprising configuration to perform multiplications in a pulsed unary domain;
- wherein the two or more AND gates each comprise an output;
- and
- wherein the outputs of each AND are connected to a time-to-voltage converter;
- wherein the time-to-voltage converter comprises an integrator comprising functionality to integrate outputs of the AND gates;
- wherein the each PWM signal generator of the two or more PWM signal generators comprises functionality to convert an analog input data to a PWM signal with a corresponding duty cycle;
- wherein the time-to-voltage converter comprises functionality to accumulate and integrate one or more output signals over time;
- and
- wherein the time-to-voltage converter comprises functionality to generate an analog voltage output.
A method for performing pulse-based convolution in a neural network, comprising:
- a. Providing an N×N bipolar near-sensor convolutional engine comprising:
- two or more pulse width modulation (PWM) signal generators;
- two or more AND gates comprising configuration to perform multiplications in a pulsed unary domain;
- and
- a time-to-voltage converter;
- b. the each PWM signal generator of the two or more PWM signal generators comprises converts an analog input data to a PWM signal with a corresponding duty signal;
- c. time-to-voltage converter that accumulates and integrates one or more output signals over time;
- and
- d. time-to-voltage converter generates an analog voltage output;
- e. wherein the time-to-voltage converter comprises an integrator, which integrates the outputs of the AND gates in an analog domain;
- f. the integrator converts the one or more output signals to the output signals' corresponding currents and integrates said signals over time in a capacitor;
- g. providing two PMOS transistors, which route a current source to a capacitor, wherein when the output signal is in a high phase, one PMOS transistor sinks the current into the capacitor;
- and
- wherein when the output signal is in a low phase, one PMOS transistor sinks the current into ground.
Dependencies are inferred from the claim text.