G06F 7/537
Reduction of the number of iteration steps or stages
Official title: Reduction of the number of iteration steps or stages, e.g. using the Sweeny-Robertson-Tocher [SRT] algorithm
G06F7/537 (Reduction of the number of iteration steps or stages) appears on 89 US grants and 40 published applications in this corpus.
Search patents in G06F- Granted patents
- 89
- Published applications
- 40
- Assignees
- 37
- Inventors
- 108
- Latest grant
- 28 Jul 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 3 | 0 |
| 1989 | 6 | 0 |
| 1990 | 4 | 0 |
| 1991 | 6 | 0 |
| 1992 | 7 | 0 |
| 1993 | 7 | 0 |
| 1994 | 7 | 0 |
| 1995 | 5 | 0 |
| 1996 | 1 | 0 |
| 1997 | 2 | 0 |
| 1998 | 2 | 0 |
| 1999 | 0 | 0 |
| 2000 | 2 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 2 | 4 |
| 2004 | 1 | 3 |
| 2005 | 1 | 0 |
| 2006 | 2 | 2 |
| 2007 | 3 | 2 |
| 2008 | 1 | 1 |
| 2009 | 1 | 2 |
| 2010 | 2 | 1 |
| 2011 | 0 | 1 |
| 2012 | 0 | 0 |
| 2013 | 0 | 3 |
| 2014 | 4 | 3 |
| 2015 | 4 | 3 |
| 2016 | 3 | 5 |
| 2017 | 3 | 1 |
| 2018 | 0 | 1 |
| 2019 | 3 | 0 |
| 2020 | 0 | 0 |
| 2021 | 1 | 1 |
| 2022 | 0 | 0 |
| 2023 | 2 | 4 |
| 2024 | 0 | 2 |
| 2025 | 1 | 1 |
| 2026 | 2 | 0 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Digit-recurrence selection constants28 Jul 2026US 12,693,829 B2Arm Limited
- Combined divide/square root processing circuitry and method21 Jul 2026US 12,688,012 B2Arm Limited
- Small multiplier after initial approximation for operations with increasing precision4 Feb 2025US 12,217,020 B2Imagination Technologies Limited
- Small multiplier after initial approximation for operations with increasing precision26 Dec 2023US 11,853,718 B2Imagination Technologies Limited
- Small multiplier after initial approximation for operations with increasing precision14 Feb 2023US 11,579,844 B2Imagination Technologies Limited
- Small Multiplier After Initial Approximation For Operations With Increasing Precision15 May 2025US 2025/0156150 A1Imagination Technologies Limited
- Divide/square-root pipeline and method5 Sep 2024US 2024/0296048 A1Arm Limited
- Small multiplier after initial approximation for operations with increasing precision18 Jul 2024US 2024/0241695 A1Imagination Technologies Limited
- Small multiplier after initial approximation for operations with increasing precision6 Jul 2023US 2023/0214186 A1Imagination Technologies Limited
- Methods and Apparatus for Quotient Digit Recoding in a High-Performance Arithmetic Unit23 Mar 2023US 2023/0086090 A1Huawei Technologies Co., Ltd.
Most cited
By later US patents
- Methods and apparatus for performing division and square root computations in a computer96US 5,404,324 AHewlett-Packard Company · 1995
- Floating-point processor having pre-adjusted exponent bias for multiplication and division58US 4,975,868 AInternational Business Machines Corporation · 1990
- Method and apparatus for performing division using a rectangular aspect ratio multiplier57US 5,046,038 ACyrix Corporation · 1991
- Quotient digit selection logic for floating point division/square root57US 6,594,681 B1Sun Microsystems, Inc. · 2003
- Zero overhead self-timed iterative logic50US 5,121,003 AHaL Computer Systems, Inc. · 1992