Digit-recurrence selection constants

A method of data processing to perform a digit-recurrence operation on an input value, comprising:

• receiving a remainder value of a previous iteration of the digit-recurrence operation;
• and
• performing comparisons on most significant bits of the remainder value of the previous iteration of the digit-recurrence operation with each of a plurality of selection constants associated with available digits of a next digit of a result of the digit-recurrence operation,
• outputting the next digit of the result of the digit-recurrence operation based on the comparisons, wherein each of the selection constants is associated with one of the available digits and an input parameter, and wherein in a division-mode of operation, the digit-recurrence operation is a division digit-recurrence operation, the input parameter is a divisor, and the selection constants comprise division selection constants, and in a square-root-mode of operation, the digit-recurrence operation is a square-root digit- recurrence operation, the input parameter is a partial root, and the selection constants comprise square-root selection constants;
• and
• storing at least a subset of the division selection constants or the square-root selection constants, and offsets indicative of how to convert between the division selection constants and the square-root selection constants.

A non-transitory computer-readable medium to store computer-readable code for fabrication of a data processing apparatus to perform a digit-recurrence operation on an input value, the data processing apparatus comprising:

• receiver circuitry configured to receive a remainder value of a previous iteration of the digit-recurrence operation;
• and
• comparison circuitry configured to perform comparisons on most significant bits of the remainder value of the previous iteration of the digit-recurrence operation with each of a plurality of selection constants associated with available digits of a next digit of a result of the digit-recurrence operation, and to output the next digit of the result of the digit-recurrence operation based on the comparisons, wherein each of the selection constants is associated with one of the available digits and an input parameter, and wherein in a division-mode of operation, the digit-recurrence operation is a division digit-recurrence operation, the input parameter is a divisor, and the selection constants comprise division selection constants, and in a square-root-mode of operation, the digit-recurrence operation is a square-root digit-recurrence operation, the input parameter is a partial root, and the selection constants comprise square-root selection constants;
• and
• storage circuitry configured to store at least a subset of the division selection constants or the square-root selection constants, and offsets indicative of how to convert between the division selection constants and the square-root selection constants.