Small multiplier after initial approximation for operations with increasing precision
AssigneeImagination Technologies Limited
InventorLeonard Rarick
Life of this patent
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AssigneeImagination Technologies Limited
InventorLeonard Rarick
Estimating the term…
In an aspect, a processor includes circuitry for iterative refinement approaches, e.g., Newton-Raphson, to evaluating functions, such as square root, reciprocal, and for division. The circuitry includes circuitry for producing an initial approximation; which can include a LookUp Table (LUT). LUT may produce an output that (with implementation-dependent processing) forms an initial approximation of a value, with a number of bits of precision. A limited-precision multiplier multiplies that initial approximation with another value; an output of the limited precision multiplier goes to a full precision multiplier circuit that performs remaining multiplications required for iteration(s) in the particular refinement process being implemented. For example, in division, the output being calculated is for a reciprocal of the divisor. The full-precision multiplier circuit requires a first number of clock cycles to complete, and both the small multiplier and the initial approximation circuitry complete within the first number of clock cycles.
An apparatus for performing an iterative arithmetic operation on an input value to obtain an output value that is used to execute an instruction requesting an arithmetic operation on an operand by said input value, comprising:
Dependencies are inferred from the claim text.