G06F 7/527
In serial-parallel fashion, i.e. one operand being entered serially and the other
Official title: in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel (G06F7/533 takes precedence)
G06F7/527 (In serial-parallel fashion, i.e. one operand being entered serially and the other) appears on 106 US grants and 63 published applications in this corpus.
Search patents in G06F- Granted patents
- 106
- Published applications
- 63
- Assignees
- 77
- Inventors
- 207
- Latest grant
- 4 Nov 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 4 | 0 |
| 1978 | 3 | 0 |
| 1979 | 0 | 0 |
| 1980 | 2 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 2 | 0 |
| 1986 | 3 | 0 |
| 1987 | 1 | 0 |
| 1988 | 1 | 0 |
| 1989 | 1 | 0 |
| 1990 | 6 | 0 |
| 1991 | 1 | 0 |
| 1992 | 6 | 0 |
| 1993 | 3 | 0 |
| 1994 | 1 | 0 |
| 1995 | 4 | 0 |
| 1996 | 3 | 0 |
| 1997 | 3 | 0 |
| 1998 | 2 | 0 |
| 1999 | 2 | 0 |
| 2000 | 2 | 0 |
| 2001 | 1 | 1 |
| 2002 | 1 | 2 |
| 2003 | 5 | 6 |
| 2004 | 1 | 0 |
| 2005 | 1 | 0 |
| 2006 | 0 | 2 |
| 2007 | 3 | 2 |
| 2008 | 2 | 1 |
| 2009 | 1 | 1 |
| 2010 | 0 | 2 |
| 2011 | 2 | 2 |
| 2012 | 2 | 2 |
| 2013 | 2 | 1 |
| 2014 | 3 | 3 |
| 2015 | 4 | 2 |
| 2016 | 0 | 2 |
| 2017 | 2 | 0 |
| 2018 | 2 | 1 |
| 2019 | 1 | 2 |
| 2020 | 1 | 8 |
| 2021 | 3 | 7 |
| 2022 | 7 | 3 |
| 2023 | 6 | 3 |
| 2024 | 2 | 4 |
| 2025 | 2 | 5 |
| 2026 | 0 | 1 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- In-memory near-data approximate acceleration4 Nov 2025US 12,461,712 B2Georgia Tech Research Corporation
- FPGA specialist processing block for machine learning24 Jun 2025US 12,340,219 B2Altera Corporation
- Systems and methods for low latency modular multiplication5 Nov 2024US 12,135,955 B2Intel Corporation
- FPGA specialist processing block for machine learning20 Feb 2024US 11,907,719 B2Intel Corporation
- Implementing large multipliers in tensor arrays7 Nov 2023US 11,809,798 B2Intel Corporation
- Multiple instruction multiple data processing unit8 Oct 2026US 2026/0310467 A1Abaxor Engineering GmbH
- Multiplier-accumulator circuit with path matching20 Nov 2025US 2025/0355623 A1British Cayman Islands Intelligo Technology Inc.
- FPGA Specialist Processing Block for Machine Learning18 Sep 2025US 2025/0291596 A1Altera Corporation
- Full adder circuit and methods for high speed computing applications21 Aug 2025US 2025/0265039 A1Samsung Electronics Co., Ltd.
- Compact and pvt-robust processing-in-memory macro with accurate analog shift-and-add15 May 2025US 2025/0156149 A1William Marsh Rice University
Most cited
By later US patents
- Reconfigurable processor devices151US 6,353,841 B1Elixent Limited · 2002
- Parallel shift and add circuit and method123US 5,390,135 AHewlett-Packard Company · 1995
- High performance microprocessor having variable speed system clock104US 5,809,336 APatriot Scientific Corporation · 1998
- High performance microprocessor having variable speed system clock82US 6,598,148 B1Patriot Scientific Corporation · 2003
- High performance, low cost microprocessor architecture68US 5,440,749 ANanotronics Corporation · 1995