Compact and pvt-robust processing-in-memory macro with accurate analog shift-and-add

A processing-in-memory (PIM) macro device comprising:

• a plurality of capacitor-based digital-to-analog converters (C-DACs), wherein the C-DACs transform a digital input into an analog voltage;
• a plurality of multiply-and-add (MAC) units, each MAC unit comprising:
• a plurality of slices, wherein each slice comprises a plurality of clusters,
• wherein each cluster in the plurality of clusters comprises a 6-transitor (6T) static random-access memory (SRAM) cell and a MAC module;
• a partial-sum combiner (P-Sum Combiner) that performs a shift-and-add operation across multiple slices within the MAC unit;
• an analog-to-digital converter (ADC) configured to convert a final output voltage from the P-Sum Combiner into a digital output;
• and
• a Share Line, a MAC Line, a plurality of wordlines (WLs), and a local bitline (LBL);
• an array of metal-oxide-metal (MOM) capacitors configured to store a charge, each capacitor comprising a top plate and a bottom plate, wherein the MOM capacitors are shared between the C-DACs and the MAC units;
• and
• an array of switches configured to be controlled to configure the MOM capacitors to perform a first operation and to reconfigure the MOM capacitors to perform a second operation.