G06F 15/7817
Specially adapted for signal processing
Official title: {Specially adapted for signal processing, e.g. Harvard architectures}
G06F15/7817 (Specially adapted for signal processing) appears on 110 US grants and 192 published applications in this corpus.
Search patents in G06F- Granted patents
- 110
- Published applications
- 192
- Assignees
- 46
- Inventors
- 182
- Latest grant
- 30 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 1 | 0 |
| 1996 | 1 | 0 |
| 1997 | 0 | 0 |
| 1998 | 1 | 0 |
| 1999 | 4 | 0 |
| 2000 | 1 | 0 |
| 2001 | 3 | 0 |
| 2002 | 3 | 5 |
| 2003 | 2 | 1 |
| 2004 | 1 | 2 |
| 2005 | 1 | 0 |
| 2006 | 1 | 1 |
| 2007 | 0 | 0 |
| 2008 | 2 | 2 |
| 2009 | 2 | 1 |
| 2010 | 1 | 1 |
| 2011 | 1 | 2 |
| 2012 | 2 | 3 |
| 2013 | 3 | 5 |
| 2014 | 4 | 3 |
| 2015 | 1 | 1 |
| 2016 | 2 | 3 |
| 2017 | 6 | 11 |
| 2018 | 7 | 13 |
| 2019 | 16 | 14 |
| 2020 | 11 | 7 |
| 2021 | 4 | 5 |
| 2022 | 8 | 9 |
| 2023 | 5 | 3 |
| 2024 | 10 | 1 |
| 2025 | 2 | 6 |
| 2026 | 3 | 93 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Parallel method and device for convolution computation and data loading of neural network accelerator30 Jun 2026US 12,670,024 B2Zhejiang Lab
- Signal processing and transmission in electronic circuits3 Feb 2026US 12,541,483 B1Auradine, Inc.
- Enhanced Harvard architecture reduced instruction set computer (RISC) with debug mode access of instruction memory within a unified memory space13 Jan 2026US 12,524,371 B2High Tech Technology Limited
- Methods and apparatus to implement always-on context sensor hubs for processing multiple different types of data inputs15 Jul 2025US 12,360,585 B2Intel Corporation
- Multiprocessor system with improved secondary interconnection network20 May 2025US 12,306,773 B2HyperX Logic, Inc.
- Simultaneous Silicon Spring and Chip Singulation DRIE13 Aug 2026US 2026/0239987 A1
- High Current Column Grid Array Pillars13 Aug 2026US 2026/0240010 A1
- Targeted Jet-Cooling System for Zetta-Scale Computing Assemblies16 Jul 2026US 2026/0202891 A1
- Local-Bias Adaptive Drive for Timing Stabilization in Pipelined Mixed-Precision Processing Elements16 Jul 2026US 2026/0203017 A1
- Pipelined Fused Multiply-Add Processing Element for FP4 Weight and FP8 Activation Arithmetic with FP8 Accumulation16 Jul 2026US 2026/0203018 A1
Most cited
By later US patents
- Method for performing multiply-add operations on packed data90US 6,385,634 B1Intel Corporation · 2002
- Microcomputer83US 5,867,726 AHitachi, Ltd. · 1999
- Microcomputer having multiple bus structure coupling CPU to other processing elements76US 5,930,523 AHitachi, Ltd. · 1999
- Apparatus for performing multiply-add operations on packed data58US 6,035,316 AIntel Corporation · 2000
- Apparatus for performing multiply-add operations on packed data49US 5,983,256 AIntel Corporation · 1999