Y10S 331/02
Phase locked loop having lock indicating or detecting means
Y10S331/02 (Phase locked loop having lock indicating or detecting means) appears on 498 US grants and 136 published applications in this corpus.
Search patents in Y10S- Granted patents
- 498
- Published applications
- 136
- Assignees
- 232
- Inventors
- 740
- Latest grant
- 28 Mar 2017
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 8 | 0 |
| 1977 | 8 | 0 |
| 1978 | 12 | 0 |
| 1979 | 2 | 0 |
| 1980 | 5 | 0 |
| 1981 | 7 | 0 |
| 1982 | 4 | 0 |
| 1983 | 9 | 0 |
| 1984 | 8 | 0 |
| 1985 | 16 | 0 |
| 1986 | 9 | 0 |
| 1987 | 6 | 0 |
| 1988 | 12 | 0 |
| 1989 | 12 | 0 |
| 1990 | 5 | 0 |
| 1991 | 8 | 0 |
| 1992 | 16 | 0 |
| 1993 | 15 | 0 |
| 1994 | 13 | 0 |
| 1995 | 6 | 0 |
| 1996 | 20 | 0 |
| 1997 | 20 | 0 |
| 1998 | 18 | 0 |
| 1999 | 32 | 0 |
| 2000 | 16 | 0 |
| 2001 | 20 | 10 |
| 2002 | 31 | 30 |
| 2003 | 36 | 21 |
| 2004 | 32 | 20 |
| 2005 | 23 | 10 |
| 2006 | 15 | 13 |
| 2007 | 17 | 14 |
| 2008 | 14 | 4 |
| 2009 | 4 | 5 |
| 2010 | 6 | 4 |
| 2011 | 6 | 1 |
| 2012 | 3 | 1 |
| 2013 | 0 | 0 |
| 2014 | 2 | 2 |
| 2015 | 1 | 1 |
| 2016 | 0 | 0 |
| 2017 | 1 | 0 |
By publication year. Applications have been published since 2001.
Recent patents
- Phase-lock loop28 Mar 2017US 9,608,645 B2Infineon Technologies AG
- Phase locked loop with bandwidth control26 May 2015US 9,041,474 B2Advanced Micro Devices, Inc.
- Loss of lock detector for clock and data recovery system26 Aug 2014US 8,816,776 B2LSI Corporation
- Phase-lock loop22 Apr 2014US 8,704,563 B2Infineon Technologies AG
- Method and apparatus for timing and event processing in wireless systems10 Apr 2012US 8,156,366 B2Mediatek Inc.
- Phase locked loop with bandwidth control5 Mar 2015US 2015/0061737 A1Advanced Micro Devices, Inc.
- Phase-lock loop14 Aug 2014US 2014/0225654 A1Infineon Technologies AG
- Loss of lock detector for clock and data recovery system15 May 2014US 2014/0132320 A1LSI Corporation
- Phase-Lock Loop3 May 2012US 2012/0105117 A1Infineon Technologies AG
- Novel switched phase and frequency detector based dpll circuit with excellent wander and jitter performance and fast frequency acquisition8 Sep 2011US 2011/0215873 A1Cisco Technology, Inc.
Most cited
By later US patents
- Segmented dual delay-locked loop for precise variable-phase clock generation151US 6,100,735 ACentillium Communications, Inc. · 2000
- Dynamic voltage control method and apparatus141US 6,889,331 B2Analog Devices, Inc. · 2005
- Method and apparatus for controlling a voltage controlled oscillator tuning range in a frequency synthesizer138US 5,686,864 AMotorola, Inc. · 1997
- Phase lock loop having a reduced synchronization transfer period134US 5,629,651 ANEC Corporation · 1997
- Phase locked loop including a sampling circuit for reducing spurious side bands127US 5,920,233 APeregrine Semiconductor Corporation · 1999