Phase locked loop with bandwidth control
AssigneesAdvanced Micro Devices, Inc., ATI Technologies ULC
InventorsSaeed Abbasi, Nima Gilanpour, Michael R. Foxcroft, George A. W. Guthrie, Raymond S. P. Tam
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Abstract
A phase locked loop (PLL) includes a first loop, a second loop, and a lock detector. The first loop locks a feedback signal having a frequency equal to a fraction of a frequency of an output signal to a reference signal in phase. The first loop has a first bandwidth. The second loop locks the feedback signal to the reference signal in frequency and has a second bandwidth. The first bandwidth is higher than the second bandwidth. The lock detector is coupled to the second loop and increases the second bandwidth in response to detecting that the feedback signal is not locked to the reference signal.
Claims20
A phase locked loop comprising:
- a first loop for locking a feedback signal having a frequency equal to a fraction of a frequency of an output signal to a reference signal in phase and having a first bandwidth;
- a second loop for locking said feedback signal to said reference signal in frequency and having a second bandwidth, wherein said first bandwidth is higher than said second bandwidth;
- and
- a lock detector coupled to said second loop for increasing said second bandwidth in response to detecting that said feedback signal is not locked to said reference signal, wherein said lock detector further has an input for defining a width of a locking window, and said feedback signal is locked in frequency to said reference signal when a predetermined edge of said feedback signal is within said width of said locking window of a corresponding edge of said reference signal.
A phase locked loop comprising:
- a phase/frequency detector having a first input for receiving a reference clock signal, a second input for receiving a feedback signal, and an output;
- a charge pump having an input coupled to said output of said phase/frequency detector, and an output coupled to a first node;
- a first loop filter having an input coupled to said charge pump for developing a first voltage on said first node for locking said feedback signal to said reference signal in phase;
- an amplifier circuit for providing a current to a second node in response to said voltage on said first node, and for developing a second voltage on said second node for locking said feedback signal to said reference signal in frequency;
- a voltage controlled oscillator having a first input coupled to said first node, a second input coupled to said second node, and an output for providing an output signal at a frequency responsive to said first and second voltages;
- a feedback divider having an input coupled to said output of said voltage controlled oscillator, and an output coupled to said second input of said phase/frequency detector;
- and
- a lock detector for boosting a bandwidth of said amplifier circuit in response to detecting that said output signal is not locked in frequency to said reference signal.
A method comprising:
- comparing a feedback clock signal to a reference clock signal;
- pumping charge into a first loop filter at a first rate based on said comparing to develop a first voltage;
- pumping charge into a second loop filter at a second rate based on said comparing to develop a second voltage, said second rate higher than said first rate;
- generating an output signal at an output frequency in response to said first and second voltages;
- dividing said output signal in frequency to provide said feedback clock signal;
- receiving an input for defining a width of a locking window;
- detecting whether said feedback clock signal is locked in frequency to said reference clock signal, wherein said feedback clock signal is locked in frequency to said reference clock signal when a predetermined edge of said feedback clock signal is within a width of said locking window of a corresponding edge of said reference clock signal;
- and
- increasing said second rate while said feedback clock signal is not locked in frequency to said reference clock signal.
Dependencies are inferred from the claim text.