Y02P 80/30
Reducing waste in manufacturing processes
Official title: Reducing waste in manufacturing processes; Calculations of released waste quantities
Y02P80/30 (Reducing waste in manufacturing processes) appears on 392 US grants and 403 published applications in this corpus.
Search patents in Y02P- Granted patents
- 392
- Published applications
- 403
- Assignees
- 173
- Inventors
- 804
- Latest grant
- 26 May 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 0 | 0 |
| 1978 | 2 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 1 | 0 |
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 5 | 0 |
| 1992 | 5 | 0 |
| 1993 | 1 | 0 |
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 1 | 0 |
| 1997 | 4 | 0 |
| 1998 | 4 | 0 |
| 1999 | 5 | 0 |
| 2000 | 4 | 0 |
| 2001 | 7 | 4 |
| 2002 | 7 | 13 |
| 2003 | 13 | 12 |
| 2004 | 15 | 24 |
| 2005 | 14 | 29 |
| 2006 | 10 | 18 |
| 2007 | 13 | 8 |
| 2008 | 14 | 16 |
| 2009 | 6 | 20 |
| 2010 | 14 | 17 |
| 2011 | 17 | 11 |
| 2012 | 10 | 13 |
| 2013 | 10 | 23 |
| 2014 | 23 | 17 |
| 2015 | 14 | 22 |
| 2016 | 16 | 18 |
| 2017 | 17 | 17 |
| 2018 | 16 | 23 |
| 2019 | 28 | 24 |
| 2020 | 19 | 18 |
| 2021 | 20 | 18 |
| 2022 | 12 | 18 |
| 2023 | 14 | 5 |
| 2024 | 15 | 7 |
| 2025 | 8 | 6 |
| 2026 | 1 | 2 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Method for producing laminates suitable for magnetic cores26 May 2026US 12,640,294 B2His Majesty the King In Right of Canada, AS Represented By the Minister of Natural Resources
- Method of making polysilicon structure including protective layer23 Dec 2025US 12,507,472 B2Taiwan Semiconductor Manufacturing Company.Ltd
- System and methods for improved sheet metal cutting2 Dec 2025US 12,485,499 B2Worth Pfaff Innovations, Inc.
- Crystal efficient SiC device wafer production18 Nov 2025US 12,476,149 B2II-Vi Advanced Materials, LLC
- Planar integrated circuit package interconnects12 Aug 2025US 12,387,999 B2Intel Corporation
- Polysilicon structure including protective layer23 Apr 2026US 2026/0114034 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Method of processing wafer15 Jan 2026US 2026/0018464 A1Disco Corporation
- Generation method of semiconductor wafers20 Nov 2025US 2025/0353215 A1Westlake Instruments (Hangzhou) Technology Co., Ltd.
- Semiconductor structure and manufacturing method thereof21 Aug 2025US 2025/0266417 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor structure and method of forming the same26 Jun 2025US 2025/0212510 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Architecture and process for integrating DMD with control circuit substrates393US 5,216,537 ATexas Instruments Incorporated · 1993
- Chip stack package and manufacturing method thereof368US 7,276,799 B2Samsung Electronics Co., Ltd. · 2007
- Architecture and process for integrating DMD with control circuit substrates328US 5,099,353 ATexas Instruments Incorporated · 1992
- Architecture and process for integrating DMD with control circuit substrates314US 5,018,256 ATexas Instruments Incorporated · 1991
- Method for producing laminated film/metal structures for known good die ("KG") applications119US 5,776,824 AMicron Technology, Inc. · 1998