H03L 7/23
With pulse counters or frequency dividers
Official title: with pulse counters or frequency dividers
H03L7/23 (With pulse counters or frequency dividers) appears on 765 US grants and 516 published applications in this corpus.
Search patents in H03L- Granted patents
- 765
- Published applications
- 516
- Assignees
- 332
- Inventors
- 1,255
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 3 | 0 |
| 1977 | 4 | 0 |
| 1978 | 4 | 0 |
| 1979 | 1 | 0 |
| 1980 | 6 | 0 |
| 1981 | 0 | 0 |
| 1982 | 2 | 0 |
| 1983 | 5 | 0 |
| 1984 | 6 | 0 |
| 1985 | 8 | 0 |
| 1986 | 3 | 0 |
| 1987 | 7 | 0 |
| 1988 | 6 | 0 |
| 1989 | 9 | 0 |
| 1990 | 5 | 0 |
| 1991 | 2 | 0 |
| 1992 | 8 | 0 |
| 1993 | 6 | 0 |
| 1994 | 7 | 0 |
| 1995 | 6 | 0 |
| 1996 | 6 | 0 |
| 1997 | 6 | 0 |
| 1998 | 14 | 0 |
| 1999 | 8 | 0 |
| 2000 | 23 | 0 |
| 2001 | 19 | 4 |
| 2002 | 21 | 27 |
| 2003 | 23 | 27 |
| 2004 | 29 | 27 |
| 2005 | 22 | 28 |
| 2006 | 32 | 18 |
| 2007 | 22 | 22 |
| 2008 | 22 | 20 |
| 2009 | 23 | 19 |
| 2010 | 18 | 16 |
| 2011 | 22 | 23 |
| 2012 | 22 | 23 |
| 2013 | 30 | 16 |
| 2014 | 27 | 24 |
| 2015 | 26 | 21 |
| 2016 | 25 | 27 |
| 2017 | 33 | 22 |
| 2018 | 26 | 24 |
| 2019 | 36 | 30 |
| 2020 | 33 | 23 |
| 2021 | 20 | 22 |
| 2022 | 31 | 16 |
| 2023 | 12 | 11 |
| 2024 | 13 | 16 |
| 2025 | 16 | 7 |
| 2026 | 7 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Multi-carrier transceiver and multi-frequency PLL system25 Aug 2026US 12,719,483 B2Telefonaktiebolaget LM Ericsson (publ)
- Linear prediction to suppress spurs in a digital phase-locked loop9 Jun 2026US 12,652,055 B2Skyworks Solutions, Inc.
- Modified control loop in a digital phase-locked loop2 Jun 2026US 12,647,121 B2Skyworks Solutions, Inc.
- Low noise block-downconverter system with local oscillator module31 Mar 2026US 12,592,734 B2Orbital Research Inc.
- Phase aligning multiple channel dividers without stopping VCO root clock17 Mar 2026US 12,580,573 B2Texas Instruments Incorporated
- Method and an apparatus for generating an output clock in a multi-loop pll system20 Aug 2026US 2026/0246473 A1Skyworks Solutions, Inc.
- Multiple PLL System with Pairwise Phase Difference Regulation20 Aug 2026US 2026/0246474 A1Telefonaktiebolaget LM Ericsson (publ)
- Phase-locked loop circuit, phase-locking method, and frequency synthesizer30 Apr 2026US 2026/0121646 A1Amlogic (Shanghai) Co., Ltd.
- Clock generation apparatus, clock generation method, adjustment apparatus, adjustment method, and non-transitory computer readable medium13 Nov 2025US 2025/0350239 A1Asahi Kasei Microdevices Corporation
- Phase noise cancelling phase locked loop (pll)14 Aug 2025US 2025/0260408 A1Arizona Board of Regents on behalf of Arizona State University
Most cited
By later US patents
- Method and system providing RF distribution for fixed wireless local loop service232US 6,014,546 ALGC Wireless, Inc. · 2000
- Method and system providing increased antenna functionality in a RF distribution system226US 5,983,070 ALGC Wireless, Inc. · 1999
- Dual-mode satellite/cellular phone with a frequency synthesizer224US 5,535,432 AEricsson GE Mobile Communications Inc. · 1996
- Distribution of radio-frequency signals through low bandwidth infrastructures222US 5,765,099 A1998
- Distribution of radio-frequency signals through low bandwidth infrastructures215US 6,157,810 ALGC Wireless, Inc. · 2000