Multi-carrier transceiver and multi-frequency PLL system

A multi-carrier transceiver for a wireless communication network node or wireless device, comprising:

• a multi-frequency Local Oscillator (LO) signal generating circuit configured to receive one periodic reference signal and to generate and output a set of LO signals, the LO signal generating circuit comprising
• a set of Phase Locked Loop (PLL) circuits, each configured to receive a frequency input signal at the reference signal frequency and a common adjustment signal, and output an LO signal, wherein the LO signal frequency is an integer multiple of the reference signal frequency, and wherein at least two PLL circuits of the set of PLL circuits are configured to output different frequency LO signals,
• wherein a plurality of PLL circuits in the set of PLL circuits each output a phase deviation signal, and
• a PLL synchronization circuit configured to receive phase deviation signals from the plurality of PLL circuits, and output the common adjustment signal to each PLL circuit in the set of PLL circuits, wherein the PLL synchronization circuit is configured to synchronize operation of the plurality of PLL circuits;
• mixers configured to frequency convert wireless communication signals between baseband and a plurality of RF carrier frequencies;
• and
• filters configured to suppress signal energy outside of a frequency band around each carrier frequency.

A multi-carrier transceiver integrated circuit, IC, system for a wireless communication network node or wireless device, comprising:

• a plurality of channels, each channel comprising:
• an antenna switch connected to an external RF filter;
• a receive chain of circuits comprising a low noise amplifier, frequency down-conversion mixer, filter, and analog to digital converter;
• and
• a transmit chain of circuits comprising a power amplifier, frequency up-conversion mixer, filter, and digital to analog converter;
• and
• a multi-frequency Local Oscillator (LO) signal generating circuit configured to receive one periodic reference signal and to generate and output a set of LO signals, the LO signal generating circuit comprising
• a set of Phase Locked Loop (PLL) circuits, each configured to receive a frequency input signal at the reference signal frequency and a common adjustment signal, and output an LO signal, wherein the LO signal frequency is an integer multiple of the reference signal frequency, and wherein at least two PLL circuits of the set of PLL circuits are configured to output different frequency LO signals,
• wherein a plurality of PLL circuits in the set of PLL circuits each output a phase deviation signal, and
• a PLL synchronization circuit configured to receive phase deviation signals from the plurality of PLL circuits, and output the common adjustment signal to each PLL circuit in the set of PLL circuits, wherein the PLL synchronization circuit is configured to synchronize operation of the plurality of PLL circuits;
• wherein LO signals provided to the mixers in different channels have corresponding different frequencies, whereby the different channels are configured to process different carrier frequency signals.