H03L 7/1806
The frequency divider comprising a phase accumulator generating the frequency divided signal
Official title: {the frequency divider comprising a phase accumulator generating the frequency divided signal}
H03L7/1806 (The frequency divider comprising a phase accumulator generating the frequency divided signal) appears on 136 US grants and 79 published applications in this corpus.
Search patents in H03L- Granted patents
- 136
- Published applications
- 79
- Assignees
- 93
- Inventors
- 200
- Latest grant
- 20 May 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1979 | 2 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 2 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 2 | 0 |
| 1991 | 2 | 0 |
| 1992 | 2 | 0 |
| 1993 | 2 | 0 |
| 1994 | 4 | 0 |
| 1995 | 1 | 0 |
| 1996 | 3 | 0 |
| 1997 | 4 | 0 |
| 1998 | 8 | 0 |
| 1999 | 3 | 0 |
| 2000 | 8 | 0 |
| 2001 | 6 | 2 |
| 2002 | 3 | 7 |
| 2003 | 5 | 4 |
| 2004 | 8 | 2 |
| 2005 | 4 | 4 |
| 2006 | 1 | 0 |
| 2007 | 1 | 4 |
| 2008 | 3 | 8 |
| 2009 | 6 | 9 |
| 2010 | 5 | 4 |
| 2011 | 8 | 3 |
| 2012 | 0 | 1 |
| 2013 | 1 | 0 |
| 2014 | 4 | 2 |
| 2015 | 2 | 4 |
| 2016 | 6 | 3 |
| 2017 | 3 | 3 |
| 2018 | 2 | 2 |
| 2019 | 8 | 9 |
| 2020 | 6 | 1 |
| 2021 | 4 | 3 |
| 2022 | 2 | 0 |
| 2023 | 1 | 1 |
| 2024 | 1 | 0 |
| 2025 | 1 | 1 |
| 2026 | 0 | 2 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Frequency synthesis using a frequency dividing circuit20 May 2025US 12,308,849 B2
- Clock scheme circuit and a mobile double data rate memory using the clock scheme circuit13 Aug 2024US 12,063,043 B2Mediatek Inc.
- Digital phase-locked loop circuit12 Sep 2023US 11,757,458 B1Cadence Design Systems, Inc.
- Clock generator17 May 2022US 11,336,289 B2Kabushiki Kaisha Toshiba
- Cross-clock-domain processing circuit5 Apr 2022US 11,296,709 B2Huawei Technologies Co., Ltd.
- Low phase noise phase locked loop16 Jul 2026US 2026/0205126 A1NXP B. V.
- Frequency synthesis using a frequency dividing circuit19 Mar 2026US 2026/0081610 A1STMicroelectronics International N. V.
- Frequency synthesis using a frequency dividing circuit2 Jan 2025US 2025/0007526 A1Centre National De La Recherche Scientifique
- Clock scheme circuit and a mobile double data rate memory using the clock scheme circuit21 Dec 2023US 2023/0412174 A1Mediatek Inc.
- Cross-Clock-Domain Processing Circuit7 Oct 2021US 2021/0313993 A1Huawei Technologies Co., Ltd.
Most cited
By later US patents
- Direct digital synthesizer driven phase lock loop frequency synthesizer118US 4,965,533 AQUALCOMM Incorporated · 1990
- Method and apparatus for providing a clock generation circuit for digitally controlled frequency or spread spectrum clocking117US 6,366,174 B1Lexmark International, Inc. · 2002
- Direct digital synthesizer driven phase lock loop frequency synthesizer with hard limiter96US 5,028,887 AQUALCOMM Incorporated · 1991
- Apparatus for reducing jitter of a spectrum spread clock signal and method therefor80US 5,651,035 AInternational Microcircuits, Inc. · 1997
- High precision, low phase noise synthesizer with vector modulator67US 6,683,918 B2Hughes Electronics Corporation · 2004