Frequency synthesis using a frequency dividing circuit

A method comprising:

• receiving, with a frequency dividing circuit, a controlled oscillator output signal and a complement of the controlled oscillator output signal;
• receiving, with the frequency dividing circuit, a positive binary word and a negative binary word;
• and
• generating, with the frequency dividing circuit, a frequency dividing circuit output signal from the controlled oscillator output signal and the complement of the controlled oscillator output signal using the positive binary word and the negative binary word, wherein a ratio of a frequency dividing circuit output signal frequency to a controlled oscillator output signal frequency is a decimal value greater than zero and less than one and is determined using a ratio of a value of the positive binary word to a sum of the value of the positive binary word and an absolute value of the negative binary word.

A frequency synthesizer comprising:

• a frequency dividing circuit configured to:
• receive a controlled oscillator output signal and a complement of the controlled oscillator output signal;
• receive a positive binary word and a negative binary word;
• generate a frequency dividing circuit output signal from the controlled oscillator output signal and the complement of the controlled oscillator output signal using a positive binary word and a negative binary word, wherein a ratio of a frequency dividing circuit output signal frequency to a controlled oscillator output signal frequency is a decimal value greater than zero and less than one and is determined using a ratio of a value of the positive binary word to a sum of the value of the positive binary word and an absolute value of the negative binary word.