H03K 5/15006
With two programmable outputs
Official title: {with two programmable outputs}
H03K5/15006 (With two programmable outputs) appears on 36 US grants and 20 published applications in this corpus.
Search patents in H03K- Granted patents
- 36
- Published applications
- 20
- Assignees
- 32
- Inventors
- 87
- Latest grant
- 7 Oct 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1983 | 1 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 1 | 0 |
| 1991 | 3 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 1 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 0 |
| 2004 | 0 | 0 |
| 2005 | 0 | 0 |
| 2006 | 0 | 0 |
| 2007 | 0 | 0 |
| 2008 | 0 | 0 |
| 2009 | 0 | 1 |
| 2010 | 0 | 2 |
| 2011 | 0 | 1 |
| 2012 | 4 | 0 |
| 2013 | 0 | 1 |
| 2014 | 2 | 1 |
| 2015 | 2 | 0 |
| 2016 | 0 | 1 |
| 2017 | 4 | 0 |
| 2018 | 1 | 2 |
| 2019 | 2 | 3 |
| 2020 | 5 | 2 |
| 2021 | 2 | 0 |
| 2022 | 1 | 1 |
| 2023 | 3 | 3 |
| 2024 | 3 | 0 |
| 2025 | 1 | 1 |
| 2026 | 0 | 1 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Hybrid clocking scheme for SERDES physical layer circuits7 Oct 2025US 12,436,558 B2QUALCOMM Incorporated
- Wide-range inductor-based delay-cell and area efficient termination switch control31 Dec 2024US 12,184,751 B2Intel Corporation
- Clock enabler circuit22 Oct 2024US 12,126,345 B2Sony Semiconductor Solutions Corporation
- Crossover point correction of differential signal30 Jan 2024US 11,886,368 B2Semiconductor Components Industries, LLC
- Frequency multiplier system with multi-transition controller28 Nov 2023US 11,831,318 B1Movellus Circuits, Inc.
- Circuitry for phase alignment of multiple frequency dividers20 Aug 2026US 2026/0246455 A1Realtek Semiconductor Corp.
- Hybrid clocking scheme for serdes physical layer circuits15 May 2025US 2025/0155917 A1QUALCOMM Incorporated
- Crossover point correction of differential signal5 Oct 2023US 2023/0315663 A1Semiconductor Components Industries, LLC
- Apparatus and method for in-phase and quadrature phase (iq) generation20 Apr 2023US 2023/0117732 A1Samsung Electronics Co., Ltd.
- Clock enabler circuit9 Feb 2023US 2023/0043523 A1Sony Semiconductor Solutions Corporation
Most cited
By later US patents
- Phase-comparator-less delay locked loop58US 6,055,287 A2000
- CMOS clock generator having an adjustable overlap voltage33US 5,041,738 AAdvanced Micro Devices, Inc. · 1991
- Digital time base generator with adjustable delay between two outputs22US 4,943,787 AMotorola, Inc. · 1990
- Apparatus for generating computer clock pulses15US 4,985,640 AIntel Corporation · 1991
- Oscillation signal generator for compensating for I/Q mismatch and communication system including the same10US 8,248,132 B2Samsung Electronics Co., Ltd. · 2012