H03K 2005/00267
Using d/a or a/d converters
Official title: {using D/A or A/D converters}
H03K2005/00267 (Using d/a or a/d converters) appears on 25 US grants and 23 published applications in this corpus.
Search patents in H03K- Granted patents
- 25
- Published applications
- 23
- Assignees
- 17
- Inventors
- 48
- Latest grant
- 14 Oct 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1985 | 1 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 1 | 1 |
| 2002 | 1 | 0 |
| 2003 | 0 | 4 |
| 2004 | 1 | 3 |
| 2005 | 1 | 1 |
| 2006 | 0 | 1 |
| 2007 | 2 | 1 |
| 2008 | 4 | 3 |
| 2009 | 3 | 0 |
| 2010 | 1 | 1 |
| 2011 | 0 | 0 |
| 2012 | 1 | 0 |
| 2013 | 0 | 0 |
| 2014 | 0 | 0 |
| 2015 | 0 | 0 |
| 2016 | 0 | 1 |
| 2017 | 1 | 0 |
| 2018 | 0 | 2 |
| 2019 | 3 | 1 |
| 2020 | 1 | 0 |
| 2021 | 0 | 1 |
| 2022 | 1 | 0 |
| 2023 | 0 | 0 |
| 2024 | 0 | 0 |
| 2025 | 1 | 1 |
| 2026 | 0 | 2 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Tuning of data interface timing between clock domains14 Oct 2025US 12,445,119 B2Texas Instruments Incorporated
- Display device and power management chip for the same12 Jul 2022US 11,386,824 B2Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Generating a plurality of clock signals or high-frequency signals4 Feb 2020US 10,551,867 B2TRUMPF Huettinger GmbH + Co. KG
- Multiplying delay locked loops with compensation for realignment error2 Jul 2019US 10,340,902 B1Analog Devices Global Unlimited Company
- Method for synchronizing data converters by means of a signal transmitted from one to the next11 Jun 2019US 10,320,406 B2Teledyne E2V Semiconductors SAS
- Memory controller using a digital signal processor in transmitters to mitigate noise and distortion in memory links2 Apr 2026US 2026/0095172 A1Mediatek Inc.
- Tuning of data interface timing between clock domains5 Feb 2026US 2026/0039284 A1Texas Instruments Incorporated
- Tuning of data interface timing between clock domains5 Jun 2025US 2025/0183882 A1Texas Instruments Incorporated
- Display device and power management chip for the same30 Dec 2021US 2021/0407355 A1Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Optical driving device and optical communication system3 Jan 2019US 2019/0007141 A1Renesas Electronics Corporation
Most cited
By later US patents
- Method and apparatus for data transfer using a time division multiple frequency scheme supplemented with polarity modulation47US 7,321,601 B2General Atomics · 2008
- Delay pulse generating circuit46US 4,504,749 ATakeda Riken Co., Ltd. · 1985
- Tunable oscillator31US 6,781,470 B2General Atomics · 2004
- Method and apparatus for adapting multi-band ultra-wideband signaling to interference sources30US 7,342,973 B2General Atomics · 2008
- Method and apparatus for data transfer using a time division multiple frequency scheme with additional modulation19US 7,609,608 B2General Atomics · 2009