H03K 2005/00097
Avoiding variations of delay using feedback
Official title: {Avoiding variations of delay using feedback, e.g. controlled by a PLL}
H03K2005/00097 (Avoiding variations of delay using feedback) appears on 202 US grants and 108 published applications in this corpus.
Search patents in H03K- Granted patents
- 202
- Published applications
- 108
- Assignees
- 108
- Inventors
- 334
- Latest grant
- 16 Jun 2026
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| Year | Granted patents | Published applications |
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| 1981 | 1 | 0 |
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| 2000 | 7 | 0 |
| 2001 | 8 | 1 |
| 2002 | 5 | 3 |
| 2003 | 6 | 17 |
| 2004 | 5 | 9 |
| 2005 | 10 | 9 |
| 2006 | 9 | 7 |
| 2007 | 13 | 7 |
| 2008 | 6 | 5 |
| 2009 | 6 | 8 |
| 2010 | 13 | 7 |
| 2011 | 5 | 10 |
| 2012 | 9 | 2 |
| 2013 | 5 | 0 |
| 2014 | 5 | 5 |
| 2015 | 5 | 3 |
| 2016 | 3 | 2 |
| 2017 | 2 | 1 |
| 2018 | 1 | 2 |
| 2019 | 5 | 3 |
| 2020 | 1 | 1 |
| 2021 | 1 | 1 |
| 2022 | 3 | 1 |
| 2023 | 1 | 0 |
| 2024 | 0 | 0 |
| 2025 | 1 | 1 |
| 2026 | 1 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Clock receiver circuit with rapid clock signal settling16 Jun 2026US 12,658,902 B2Apple Inc.
- Pulse generator and method23 Sep 2025US 12,425,010 B2Cypress Semiconductor Corporation
- Method and apparatus for precision phase skew generation30 May 2023US 11,664,793 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Electronic circuit and method for clock skew-calibration22 Feb 2022US 11,256,286 B1Samsung Electronics Co., Ltd.
- Demodulation methods and devices for frequency-modulated (FM) signals15 Feb 2022US 11,251,783 B1Raytheon Company
- Clock receiver circuit with rapid clock signal settling2 Apr 2026US 2026/0095169 A1Apple Inc.
- Pulse generator and method8 Jan 2026US 2026/0012165 A1Cypress Semiconductor Corporation
- Electronic circuit and method for adjusting a transition time of buffers of a buffer chain1 Jan 2026US 2026/0005676 A1The Swatch Group Research and Development Ltd
- Pulse generator and method21 Aug 2025US 2025/0266817 A1Cypress Semiconductor Corporation
- Method and apparatus for precision phase skew generation28 Apr 2022US 2022/0131536 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Phase-locked loop delay line196US 4,922,141 AWestern Digital Corporation · 1990
- Delay line loop for 1X on-chip clock generation with zero skew and 50% duty cycle111US 5,317,202 AIntel Corporation · 1994
- Integrated logic circuit with clock skew adjusters110US 5,122,679 AHitachi, Ltd. · 1992
- Programmable capacitance delay element having inverters controlled by adjustable voltage to offset temperature and voltage supply variations108US 5,283,631 AHewlett-Packard Company · 1994
- Delay line loop for on-chip clock synthesis with zero skew and 50% duty cycle108US 5,410,263 AIntel Corporation · 1995