G06F 9/34
Addressing or accessing the instruction operand or the result
Official title: Addressing or accessing the instruction operand or the result {; Formation of operand address; Addressing modes (address translation G06F12/00)}
G06F9/34 (Addressing or accessing the instruction operand or the result) appears on 2,093 US grants and 1,723 published applications in this corpus.
Search patents in G06F- Granted patents
- 2,093
- Published applications
- 1,723
- Assignees
- 459
- Inventors
- 3,544
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 8 | 0 |
| 1977 | 13 | 0 |
| 1978 | 8 | 0 |
| 1979 | 5 | 0 |
| 1980 | 11 | 0 |
| 1981 | 6 | 0 |
| 1982 | 8 | 0 |
| 1983 | 9 | 0 |
| 1984 | 11 | 0 |
| 1985 | 19 | 0 |
| 1986 | 3 | 0 |
| 1987 | 10 | 0 |
| 1988 | 8 | 0 |
| 1989 | 13 | 0 |
| 1990 | 9 | 0 |
| 1991 | 3 | 0 |
| 1992 | 16 | 0 |
| 1993 | 25 | 0 |
| 1994 | 22 | 0 |
| 1995 | 31 | 0 |
| 1996 | 30 | 0 |
| 1997 | 38 | 0 |
| 1998 | 54 | 0 |
| 1999 | 58 | 0 |
| 2000 | 53 | 0 |
| 2001 | 49 | 6 |
| 2002 | 41 | 40 |
| 2003 | 55 | 53 |
| 2004 | 55 | 57 |
| 2005 | 42 | 49 |
| 2006 | 45 | 33 |
| 2007 | 41 | 43 |
| 2008 | 33 | 51 |
| 2009 | 37 | 46 |
| 2010 | 42 | 45 |
| 2011 | 46 | 35 |
| 2012 | 40 | 39 |
| 2013 | 32 | 60 |
| 2014 | 50 | 72 |
| 2015 | 52 | 64 |
| 2016 | 69 | 58 |
| 2017 | 66 | 106 |
| 2018 | 68 | 69 |
| 2019 | 77 | 147 |
| 2020 | 120 | 115 |
| 2021 | 126 | 111 |
| 2022 | 101 | 109 |
| 2023 | 100 | 90 |
| 2024 | 103 | 106 |
| 2025 | 85 | 59 |
| 2026 | 47 | 60 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Processor embedded streaming buffer29 Sep 2026US 12,748,592 B2Intel Corporation
- Array processor having an instruction sequencer including a program state controller and loop controllers29 Sep 2026US 12,748,596 B2Silicon Laboratories Inc.
- Processor supporting position-independent addressing29 Sep 2026US 12,748,597 B2Oracle International Corporation
- Method and apparatus for permuting streamed data elements8 Sep 2026US 12,730,758 B2Texas Instruments Incorporated
- Parallel computation on input vectors by orthogonal representation1 Sep 2026US 12,724,608 B2International Business Machines Corporation
- Processing-in-memory system including scale-up architecture8 Oct 2026US 2026/0310464 A1SK hynix Inc.
- Inserting null vectors into a stream of vectors8 Oct 2026US 2026/0310466 A1Texas Instruments Incorporated
- Data packing for power and area-efficient memory structures and performance-efficient decoding of encoded data17 Sep 2026US 2026/0277612 A1Xilinx, Inc.
- Tracking near-identical memory addresses and reducing memory access requests17 Sep 2026US 2026/0277852 A1Mobileye Vision Technologies Ltd.
- Hardware assisted instruction prefetch for faster processor cluster low power mode (lpm) exit3 Sep 2026US 2026/0259733 A1QUALCOMM Incorporated
Most cited
By later US patents
- Multiple address-space data processor with addressable register and context switching470US 5,201,039 AMitsubishi Denki Kabushiki Kaisha · 1993
- Multi-tiered indexing method for partitioned data457US 5,551,027 AInternational Business Machines Corporation · 1996
- Processor-cache system and method417US 9,047,193 B2Shanghai Xin Hao Micro Electronics Co. Ltd. · 2015
- Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags403US 5,226,126 ANexgen Microsystems · 1993
- Sparse convolutional neural network accelerator339US 10,891,538 B2NVIDIA Corporation · 2021