US 12,724,608 B2 · Parallel computation on input vectors by orthogonal representation

Abstract

An array of resistive memory elements can be configured to store a plurality of values representing elements of a matrix. The array of resistive memory elements can be further configured to, responsive to an input vector being provided to the resistive memory elements, output a resulting vector representing a matrix multiplication of the matrix and the input vector, where the input vector includes a summation of a plurality of orthogonal vectors. A plurality of matched filters can be connected to outputs of the resistive memory elements, where each of the plurality of matched filters is configured to extract from the resulting vector a matrix multiplication result corresponding to a matrix multiplication of the matrix with one of the orthogonal vectors for which the respective matched filter is matched.

Claims20

Dependent claims

A device comprising:

an array of resistive memory elements configured to store a plurality of values representing elements of a matrix, the array of resistive memory elements further configured to, responsive to an input vector being provided to the resistive memory elements, output a resulting vector representing a matrix multiplication of the matrix and the input vector, wherein the input vector comprises a summation of a plurality of orthogonal vectors;
and
a plurality of matched filters connected to outputs of the resistive memory elements, wherein each of the plurality of matched filters is configured to extract from the resulting vector a matrix multiplication result corresponding to a matrix multiplication of the matrix with one of the orthogonal vectors for which said each matched filter is matched.

A method comprising:

receiving an input vector comprising a summation of a plurality of orthogonal vectors, wherein the input vector is received at an array of resistive memory elements that store a plurality of values representing elements of a matrix, wherein the array of resistive memory elements outputs a resulting vector representing a matrix multiplication of the matrix and the input vector, wherein outputs of the array of resistive memory elements are connected to a plurality of matched filters;
extracting from the resulting vector, by each of the plurality of matched filters, a matrix multiplication result corresponding to a matrix multiplication of the matrix with one of the orthogonal vectors for which said each matched filter is matched.

A system comprising:

an array of resistive memory elements;
a processor configured to pass an input vector representing a sum of a plurality of orthogonal vectors to the array of resistive memory elements;
the array of resistive memory elements being configured to:
store a plurality of values representing elements of a matrix;
and
responsive to receiving the input vector, output a resulting vector representing a matrix multiplication of the matrix and the input vector;
and
a plurality of matched filters connected to outputs of the array of resistive memory elements, wherein each of the plurality of matched filters is configured to extract from the resulting vector a matrix multiplication result corresponding to a matrix multiplication of the matrix with one of the orthogonal vectors for which said each matched filter is matched.

5 more elements

Dependencies are inferred from the claim text.

Parallel computation on input vectors by orthogonal representation

Life of this patent

Parallel computation on input vectors by orthogonal representation

Life of this patent

Abstract

Claims20