G06F 9/30087
Synchronisation or serialisation instructions
Official title: {Synchronisation or serialisation instructions}
G06F9/30087 (Synchronisation or serialisation instructions) appears on 1,408 US grants and 1,388 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,408
- Published applications
- 1,388
- Assignees
- 225
- Inventors
- 2,167
- Latest grant
- 8 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 2 | 0 |
| 1988 | 1 | 0 |
| 1989 | 2 | 0 |
| 1990 | 0 | 0 |
| 1991 | 7 | 0 |
| 1992 | 3 | 0 |
| 1993 | 6 | 0 |
| 1994 | 8 | 0 |
| 1995 | 10 | 0 |
| 1996 | 9 | 0 |
| 1997 | 12 | 0 |
| 1998 | 24 | 0 |
| 1999 | 20 | 0 |
| 2000 | 21 | 0 |
| 2001 | 28 | 2 |
| 2002 | 17 | 30 |
| 2003 | 26 | 29 |
| 2004 | 33 | 62 |
| 2005 | 23 | 31 |
| 2006 | 21 | 41 |
| 2007 | 33 | 57 |
| 2008 | 33 | 69 |
| 2009 | 50 | 63 |
| 2010 | 48 | 41 |
| 2011 | 53 | 59 |
| 2012 | 54 | 40 |
| 2013 | 52 | 89 |
| 2014 | 57 | 42 |
| 2015 | 44 | 88 |
| 2016 | 96 | 79 |
| 2017 | 85 | 97 |
| 2018 | 70 | 71 |
| 2019 | 70 | 59 |
| 2020 | 73 | 59 |
| 2021 | 84 | 61 |
| 2022 | 61 | 51 |
| 2023 | 56 | 49 |
| 2024 | 52 | 57 |
| 2025 | 29 | 29 |
| 2026 | 34 | 33 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Method for improving GPU efficiency via programmatic tests of synchronization primitive progress8 Sep 2026US 12,730,637 B2Advanced Micro Devices, Inc.
- Hierarchical thread scheduling based on multi-parameter signal barriers25 Aug 2026US 12,717,582 B2Intel Corporation
- Application programming interface to wait on matrix multiply-accumulate18 Aug 2026US 12,710,961 B2NVIDIA Corporation
- Application programming interface to check memory transaction information4 Aug 2026US 12,700,056 B2NVIDIA Corporation
- NUMA multi-core processor switching between lock modes, operating method, and instructions therefor28 Jul 2026US 12,693,908 B2Shanghai Zhaoxin Semiconductor Co., Ltd.
- Machine Learning Network Implemented by Statically Scheduled Instructions17 Sep 2026US 2026/0278361 A1SiMa Technologies, Inc.
- Programmable stream triggered multithreading capable streaming dataflow deep learning accelerator27 Aug 2026US 2026/0252392 A1STMicroelectronics International N. V.
- Delegating data processing tasks27 Aug 2026US 2026/0252412 A1Arm Limited
- Task management20 Aug 2026US 2026/0244494 A1NVIDIA Corporation
- Memory access instruction reordering20 Aug 2026US 2026/0244561 A1Arm Limited
Most cited
By later US patents
- Vector processor system420US 8,356,144 B22013
- Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation402US 5,212,777 ATexas Instruments Incorporated · 1993
- DRAM with high bandwidth interface that uses packets and arbitration313US 5,778,419 AMicroUnity Systems Engineering, Inc. · 1998
- Register to memory data transfers with field extraction and zero/sign extension based upon size and mode data corresponding to employed address register277US 5,758,195 ATexas Instruments Incorporated · 1998
- System for achieving atomic non-sequential multi-word operations in shared memory261US 5,428,761 ADigital Equipment Corporation · 1995