G06F 7/5336
Overlapped, i.e. with successive bitgroups sharing one or more bits being recoded
Official title: {overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm}
G06F7/5336 (Overlapped, i.e. with successive bitgroups sharing one or more bits being recoded) appears on 336 US grants and 127 published applications in this corpus.
Search patents in G06F- Granted patents
- 336
- Published applications
- 127
- Assignees
- 129
- Inventors
- 503
- Latest grant
- 14 Jan 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 2 | 0 |
| 1978 | 2 | 0 |
| 1979 | 2 | 0 |
| 1980 | 5 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 2 | 0 |
| 1986 | 2 | 0 |
| 1987 | 7 | 0 |
| 1988 | 6 | 0 |
| 1989 | 14 | 0 |
| 1990 | 7 | 0 |
| 1991 | 10 | 0 |
| 1992 | 6 | 0 |
| 1993 | 13 | 0 |
| 1994 | 13 | 0 |
| 1995 | 11 | 0 |
| 1996 | 8 | 0 |
| 1997 | 11 | 0 |
| 1998 | 22 | 0 |
| 1999 | 20 | 0 |
| 2000 | 21 | 0 |
| 2001 | 18 | 3 |
| 2002 | 14 | 9 |
| 2003 | 11 | 12 |
| 2004 | 10 | 11 |
| 2005 | 7 | 9 |
| 2006 | 7 | 4 |
| 2007 | 10 | 8 |
| 2008 | 5 | 4 |
| 2009 | 6 | 8 |
| 2010 | 8 | 2 |
| 2011 | 2 | 3 |
| 2012 | 7 | 10 |
| 2013 | 4 | 14 |
| 2014 | 13 | 4 |
| 2015 | 5 | 4 |
| 2016 | 5 | 0 |
| 2017 | 4 | 1 |
| 2018 | 1 | 2 |
| 2019 | 1 | 6 |
| 2020 | 6 | 4 |
| 2021 | 5 | 2 |
| 2022 | 1 | 0 |
| 2023 | 0 | 0 |
| 2024 | 0 | 2 |
| 2025 | 1 | 5 |
By publication year. Applications have been published since 2001.
Subgroups
Granted patents
Recent patents
- Rank-based dot product circuitry14 Jan 2025US 12,197,888 B2Altera Corporation
- Full adder cell with improved power efficiency5 Apr 2022US 11,294,631 B2NVIDIA Corporation
- Full adder cell with improved power efficiency9 Nov 2021US 11,169,779 B2NVIDIA Corporation
- Apparatus and method for processing an instruction matrix specifying parallel and dependent operations2 Nov 2021US 11,163,720 B2Intel Corporation
- High radix subset code multiplier architecture18 May 2021US 11,010,134 B2Intel Corporation
- Multiplier-accumulator circuit with path matching20 Nov 2025US 2025/0355623 A1British Cayman Islands Intelligo Technology Inc.
- Mixed-Radix Multiplier Circuit2 Oct 2025US 2025/0306854 A1
- Multiplier Circuit with Carry-Based Partial Product Encoding7 Aug 2025US 2025/0251910 A1Altera Corporation
- Multiplier and its computational processing method8 May 2025US 2025/0147727 A1Glenfly Tech Co., Ltd. (Shanghai)
- Rank-based dot product circuitry17 Apr 2025US 2025/0123804 A1Altera Corporation
Most cited
By later US patents
- Multiplier circuit design for a programmable logic device172US 5,754,459 AXilinx, Inc. · 1998
- Multiplying unit in a computer system, capable of population counting155US 4,989,168 AFujitsu Limited · 1991
- Reconfigurable processor devices151US 6,353,841 B1Elixent Limited · 2002
- Multiplier accumulator circuits96US 6,571,268 B1Texas Instruments Incorporated · 2003
- Split multiply operation94US 5,446,651 ATexas Instruments Incorporated · 1995