G06F 2119/16
Equivalence checking
G06F2119/16 (Equivalence checking) appears on 90 US grants and 83 published applications in this corpus.
Search patents in G06F- Granted patents
- 90
- Published applications
- 83
- Assignees
- 48
- Inventors
- 242
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2008 | 0 | 1 |
| 2009 | 1 | 0 |
| 2010 | 1 | 0 |
| 2011 | 0 | 0 |
| 2012 | 0 | 0 |
| 2013 | 1 | 2 |
| 2014 | 2 | 3 |
| 2015 | 6 | 5 |
| 2016 | 8 | 12 |
| 2017 | 7 | 4 |
| 2018 | 4 | 6 |
| 2019 | 4 | 3 |
| 2020 | 8 | 4 |
| 2021 | 18 | 9 |
| 2022 | 6 | 8 |
| 2023 | 6 | 8 |
| 2024 | 5 | 9 |
| 2025 | 6 | 7 |
| 2026 | 7 | 2 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- System and method for automatic generation of standard cells using satisfiability modulo theory solver22 Sep 2026US 12,743,572 B2Silvaco, Inc.
- Layout versus schematic (LVS) device extraction using pattern matching11 Aug 2026US 12,705,414 B2Synopsys, Inc.
- Method and apparatus for mutation coverage testing with incremental sat queries21 Jul 2026US 12,688,346 B1Cadence Design Systems, Inc.
- Techniques for comparing geometric styles of 3D CAD objects16 Jun 2026US 12,657,351 B2Autodesk, Inc.
- System for determining identicalness amongst wire harnesses2 Jun 2026US 12,644,935 B2
- Attribute-Point-Based Timing Constraint Formal Verification18 Jun 2026US 2026/0168581 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Method of and system for generating layout diagram of integrated circuit device having transistor architecture18 Jun 2026US 2026/0170223 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Computer-Implemented Methods of Verifying a Processor Design Under Test, and Related Systems27 Nov 2025US 2025/0363275 A1Synopsys, Inc.
- Method and system for determining equivalence of design rule manual data and design rule checking data13 Nov 2025US 2025/0348646 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Shell or offset feature detection in a 3d model representing a mechanical part30 Oct 2025US 2025/0336176 A1Dassault Systemes
Most cited
By later US patents
- Method and apparatus for maintaining synchronization between layout clones35US 7,555,739 B1Cadence Design Systems, Inc. · 2009
- System and method for selecting a respirator13US 9,361,411 B2Honeywell International Inc. · 2016
- System and method for simulator assertion synthesis and digital equivalence checking8US 9,009,635 B1Cadence Design Systems, Inc. · 2015
- System and method for automated simulator assertion synthesis and digital equivalence checking7US 9,032,347 B1Cadence Design Systems, Inc. · 2015
- Register retiming and verification of an integrated circuit design7US 9,529,947 B1Altera Corporation · 2016