Layout versus schematic (LVS) device extraction using pattern matching
AssigneeSynopsys, Inc.
InventorsSoo Han Choi, Anil Karanam, Elango Velayutham, Yuli Xue
Life of this patent
Estimating the term…
Abstract
A method includes obtaining a target integrated circuit (IC) layout, accessing a repository, identifying a device within the target IC layout by matching an area of the target IC layout to a source pattern, and replacing at least a portion of the area of the target IC layout with a replacement pattern. The repository stores the source pattern for the device and the replacement pattern corresponding to the source pattern.
Claims18
A method, comprising:
- obtaining a target integrated circuit (IC) layout;
- accessing a repository storing:
- a source pattern for a device, the source pattern comprising a plurality of device layers;
- and
- a replacement pattern corresponding to the source pattern, wherein the replacement pattern comprises a plurality of marker layers, the plurality of marker layers comprising at least one of a body layer or a terminal layer;
- identifying, using one or more processors, the device within the target IC layout by matching an area of the target IC layout to the source pattern;
- and
- replacing, using the one or more processors, at least a portion of the area of the target IC layout with the replacement pattern.
A system, comprising:
- a repository storing:
- a source pattern for a device, the source pattern comprising a plurality of device layers;
- and
- a replacement pattern corresponding to the source pattern, wherein the replacement pattern comprises a plurality of marker layers, the plurality of marker layers comprising at least one of a body layer or a terminal layer;
- a memory storing instructions;
- and
- a processor, coupled with the memory and to execute the instructions, the instructions when executed cause the processor to:
- obtain a target integrated circuit (IC) layout;
- identify the device within the target IC layout by matching an area of the target IC layout to the source pattern;
- and
- replace at least a portion of the area of the target IC layout with the replacement pattern.
A non-transitory computer readable medium comprising stored instructions, the instructions, which when executed by a processor, cause the processor to:
- generate a pattern library, wherein the pattern library comprises a source pattern of a device and a replacement pattern corresponding to the source pattern, wherein the source pattern comprises a plurality of device layers, and wherein the replacement pattern comprises a plurality of marker layers, the plurality of marker layers comprising at least one of a body layer or a terminal layer;
- acquire an input integrated circuit (IC) design;
- perform pattern matching between the input IC design and the pattern library;
- and
- output the replacement pattern corresponding to a matched source pattern.
Dependencies are inferred from the claim text.