Emulex Corporation
Costa Mesa, CA, US· latest recorded location
Emulex Corporation is named on 82 US grants and 69 published applications in this corpus. Its most frequent classification is H04L (Digital communication).
- Granted patents
- 82
- Published applications
- 69
- Inventors
- 107
- Granted in 2026 so far
- 0
- Most recent grant
- 24 Nov 2015
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1986 | 1 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 1 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 1 | 0 |
| 1997 | 1 | 0 |
| 1998 | 2 | 0 |
| 1999 | 2 | 0 |
| 2000 | 7 | 0 |
| 2001 | 9 | 0 |
| 2002 | 3 | 1 |
| 2003 | 3 | 2 |
| 2004 | 4 | 10 |
| 2005 | 0 | 1 |
| 2006 | 1 | 0 |
| 2007 | 0 | 0 |
| 2008 | 0 | 4 |
| 2009 | 0 | 1 |
| 2010 | 1 | 0 |
| 2011 | 0 | 3 |
| 2012 | 1 | 1 |
| 2013 | 1 | 3 |
| 2014 | 18 | 12 |
| 2015 | 24 | 29 |
| 2016 | 0 | 2 |
By publication year.
Technology areas
Share of 151 documents
- H04LDigital communication96
- G06FComputing and data processing75
- H04QSelecting19
- H04BTransmission16
- Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information7
- Y10TTechnical subjects covered by former us classification6
- G11CStatic stores4
- H03MCoding3
- H04JMultiplex communication3
- Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests3
Recent patents
- Data bus efficiency via cache line usurpation24 Nov 2015US 9,195,605 B2
- Reducing write I/O latency using asynchronous Fibre Channel exchange24 Nov 2015US 9,195,626 B2
- Enhanced I/O performance in a multi-processor system via interrupt affinity schemes10 Nov 2015US 9,183,167 B2
- SAS expander based persistent connections10 Nov 2015US 9,183,169 B2
- Adaptive receive path learning to facilitate combining TCP offloading and network adapter teaming6 Oct 2015US 9,154,427 B2
- Dynamic rdma queue on-loading28 Jan 2016US 2016/0026604 A1
- Registrationless transmit onload rdma28 Jan 2016US 2016/0026605 A1
- System and Method for Error Recovery in an Asynchronous FIFO31 Dec 2015US 2015/0378812 A1
- Data Bus Efficiency Via Cache Line Usurpation31 Dec 2015US 2015/0378923 A1
- Soft Error Protection For Content Addressable Memory24 Dec 2015US 2015/0370708 A1
Most cited
By later US patents
- Bus interface synchronization circuitry for reducing time between successive data transmission in a system using an asynchronous handshaking109US 5,276,807 A1994
- Full-duplex communication processor which can be used for fibre channel frames109US 6,005,849 A1999
- Buffer memory data flow controller94US 5,249,271 A1993
- Burst broadcasting on a peripheral component interconnect bus93US 5,634,138 A1997
- Structure and method for maintaining ordered linked lists79US 7,685,121 B22010