Y10S 148/127
Process induced defects
Y10S148/127 (Process induced defects) appears on 10 US grants and 0 published applications in this corpus.
Search patents in Y10S- Granted patents
- 10
- Published applications
- 0
- Assignees
- 8
- Inventors
- 18
- Latest grant
- 13 May 1997
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1985 | 1 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 0 | 0 |
| 1992 | 1 | 0 |
| 1993 | 2 | 0 |
| 1994 | 0 | 0 |
| 1995 | 2 | 0 |
| 1996 | 0 | 0 |
| 1997 | 1 | 0 |
By publication year. Applications have been published since 2001.
Recent patents
- Method for producing semiconductor wafers with low light scattering anomalies13 May 1997US 5,629,216 ASEH America, Inc.
- Method of controlling misfit dislocation7 Mar 1995US 5,395,770 AShin-Etsu Handotai Co., Ltd.
- Method of making tapered poly profile for TFT device manufacturing28 Feb 1995US 5,393,682 ATaiwan Semiconductor Manufacturing Company.Ltd
- Method of fabricating SOI substrate with uniform thin silicon film31 Aug 1993US 5,240,883 AShin-Etsu Handotai Co., Ltd.
- Method for semiconductor isolation9 Mar 1993US 5,192,706 ATexas Instruments Incorporated
No published applications in this class yet.
Most cited
By later US patents
- Method for producing semiconductor wafers with low light scattering anomalies42US 5,629,216 ASEH America, Inc. · 1997
- Method of manufacturing a semiconductor substrate having dielectric regions37US 4,552,595 AOki Electric Industry Co., Ltd. · 1985
- Method of making tapered poly profile for TFT device manufacturing31US 5,393,682 ATaiwan Semiconductor Manufacturing Company.Ltd · 1995
- Gettering process with multi-step annealing and inert ion implantation26US 4,885,257 AKabushiki Kaisha Toshiba · 1989
- Method of standardizing and stabilizing semiconductor wafers18US 4,637,123 AInternational Business Machines Corporation · 1987