H04Q 3/0004
Selecting arrangements: using crossbar selectors in the switching stages
Official title: {using crossbar selectors in the switching stages}
H04Q3/0004 (Selecting arrangements: using crossbar selectors in the switching stages) appears on 42 US grants and 33 published applications in this corpus.
Search patents in H04Q- Granted patents
- 42
- Published applications
- 33
- Assignees
- 19
- Inventors
- 59
- Latest grant
- 24 Feb 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 3 | 0 |
| 1977 | 2 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 1 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 4 |
| 2004 | 1 | 1 |
| 2005 | 2 | 1 |
| 2006 | 1 | 2 |
| 2007 | 4 | 1 |
| 2008 | 2 | 1 |
| 2009 | 1 | 1 |
| 2010 | 0 | 3 |
| 2011 | 0 | 0 |
| 2012 | 0 | 0 |
| 2013 | 2 | 0 |
| 2014 | 0 | 1 |
| 2015 | 0 | 0 |
| 2016 | 2 | 1 |
| 2017 | 0 | 0 |
| 2018 | 0 | 1 |
| 2019 | 6 | 11 |
| 2020 | 9 | 1 |
| 2021 | 0 | 2 |
| 2022 | 1 | 1 |
| 2023 | 2 | 0 |
| 2024 | 0 | 1 |
| 2025 | 1 | 0 |
| 2026 | 1 | 0 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Reconfigurable streaming processor for security computations24 Feb 2026US 12,561,275 B1Marvell Asia Pte Ltd
- Multi-die non-blocking crossbar switch8 Apr 2025US 12,273,668 B2Xilinx, Inc.
- Localized NoC switching interconnect for high bandwidth interfaces28 Nov 2023US 11,832,035 B2Xilinx, Inc.
- Optimizing connectivity in reconfigurable networks18 Apr 2023US 11,632,330 B2The Regents of the University of California
- Two-stage ramp ADC in crossbar array circuits for high-speed matrix multiplication computing20 Dec 2022US 11,531,728 B2TetraMem Inc.
- Multi-die non-blocking crossbar switch20 Jun 2024US 2024/0205570 A1Xilinx, Inc.
- Localized noc switching interconnect for high bandwidth interfaces20 Oct 2022US 2022/0337923 A1Xilinx, Inc.
- Two-stage ramp adc in crossbar array circuits for high-speed matrix multiplication computing2 Sep 2021US 2021/0271732 A1TetraMem Inc.
- Optimizing connectivity in reconfigurable networks11 Feb 2021US 2021/0044531 A1The Regents of the University of California
- Techniques for computing dot products with memory devices27 Feb 2020US 2020/0067512 A1The Regents of the University of Michigan
Most cited
By later US patents
- Algorithm mapping, specialized instructions and architecture features for smart memory computing432US 7,546,438 B22009
- Algorithm mapping, specialized instructions and architecture features for smart memory computing102US 6,970,988 B12005
- Large crossbar switch implemented in FPGA83US 6,759,869 B1Xilinx, Inc. · 2004
- Large crossbar switch implemented in FPGA68US 7,057,413 B1Xilinx, Inc. · 2006
- Asynchronous system-on-a-chip interconnect48US 7,239,669 B2Fulcrum Microsystems, Inc. · 2007