Techniques for computing dot products with memory devices

A memory device comprising:

• an array of memory cells arranged in columns and rows;
• an interface circuit, coupled to the array of memory cells, and configured to;
• receive a set of first vectors and a second vector;
• load the set of first vectors in the array of memory cells;
• compute an third vector as a dot product of the second vector and the set of first vectors by feeding the second vector forward through the array of memory cells loaded with the first vector;
• compute a fourth vector as a non-linear transform of the third vector,
• compute a fifth vector as a dot product of the fourth vector and a transpose of the set of first vectors by feeding the fourth vector backward through the array of memory cells loaded with the set of first vectors;
• compute a sixth vector as a difference between the fifth vector and the second vector;
• and
• compute a new instance of the third vector as a dot product of the sixth vector and the first vector by feeding the sixth vector through the array of memory cells loaded with the first vector.

A memory device comprising:

• an array of memory cells arranged in columns and rows, wherein the array of memory cells include a plurality of tiles of the memory cells;
• a number of interface circuits coupled to the plurality of tiles of the array of memory cells, and wherein a first one of the number of interface circuits is configured to;
• load a set of one or more first vectors in a first one of the plurality of tiles of the array of memory cells;
• feed a second vector forward through the first tile of the array of memory cells to compute a third vector as a dot product of the set of one or more first vectors and the second vector;
• and
• feed a forth vector backward through the first tile of the array of memory cells to compute a fifth vector as a dot product of the fourth vector and a transpose of the set of one or more first vectors.

A method comprising:

• loading a set of one or more first vectors in an array of memory cells arranged in a plurality of columns and rows;
• feeding a second vector into corresponding rows of the array of memory cells and sensing the corresponding columns loaded with the set of one or more first vectors to compute a third vector as a dot product of the second vector and the set of one or more first vectors;
• and
• feeding a fourth vector into corresponding columns of the array of memory cells and sensing the corresponding rows loaded with the set of one or more first vectors to compute a fifth vector as a dot product of the fourth vector and a transpose of the set of one or more first vectors.