H04L 7/005
Correction by an elastic buffer
Official title: {Correction by an elastic buffer}
H04L7/005 (Correction by an elastic buffer) appears on 315 US grants and 255 published applications in this corpus.
Search patents in H04L- Granted patents
- 315
- Published applications
- 255
- Assignees
- 198
- Inventors
- 637
- Latest grant
- 15 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 0 | 0 |
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 0 | 0 |
| 1989 | 2 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 1 | 0 |
| 1993 | 1 | 0 |
| 1994 | 1 | 0 |
| 1995 | 1 | 0 |
| 1996 | 4 | 0 |
| 1997 | 3 | 0 |
| 1998 | 3 | 0 |
| 1999 | 5 | 0 |
| 2000 | 5 | 0 |
| 2001 | 4 | 2 |
| 2002 | 8 | 5 |
| 2003 | 10 | 22 |
| 2004 | 17 | 19 |
| 2005 | 15 | 14 |
| 2006 | 15 | 21 |
| 2007 | 20 | 22 |
| 2008 | 15 | 11 |
| 2009 | 16 | 13 |
| 2010 | 18 | 3 |
| 2011 | 13 | 12 |
| 2012 | 15 | 6 |
| 2013 | 12 | 10 |
| 2014 | 12 | 12 |
| 2015 | 11 | 7 |
| 2016 | 12 | 11 |
| 2017 | 11 | 6 |
| 2018 | 3 | 6 |
| 2019 | 12 | 7 |
| 2020 | 4 | 4 |
| 2021 | 5 | 13 |
| 2022 | 8 | 8 |
| 2023 | 7 | 6 |
| 2024 | 7 | 5 |
| 2025 | 8 | 7 |
| 2026 | 5 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Electronic digital system comprising a serializer deserializer module, serializer deserializer module and method of control15 Sep 2026US 12,739,093 B2STMicroelectronics International N. V.
- Serialization circuitry having an integrated buffer for a serializer/derserilizer communication system26 May 2026US 12,640,901 B2Advanced Micro Devices, Inc.
- Interface device and method of operating the same12 May 2026US 12,625,840 B2SK hynix Inc.
- Dual path clock forwarding14 Apr 2026US 12,603,750 B2Credo Technology Group Limited
- Clock domain phase adjustment for memory operations24 Mar 2026US 12,585,387 B2Advanced Micro Devices, Inc.
- Interface device and method of operating the same27 Aug 2026US 2026/0252524 A1SK hynix Inc.
- Device and computing system including the device27 Aug 2026US 2026/0254606 A1SK hynix Inc.
- Clock and data recovery (cdr) circuitry utilizing blind sampling28 May 2026US 2026/0149557 A1Protocol Insight, LLC
- Physical layer transceiver with reduced variation in packet latency6 Nov 2025US 2025/0343746 A1Marvell Asia Pte Ltd
- Serialization circuitry having an integrated buffer for a serializer/derserilizer communication system11 Sep 2025US 2025/0286696 A1Advanced Micro Devices, Inc.
Most cited
By later US patents
- Time alignment of transmission in a down-link of CDMA system215US 5,828,659 ATelefonaktiebolaget LM Ericsson · 1998
- High-speed chip-to-chip communication interface147US 7,180,949 B2Lucent Technologies Inc. · 2007
- Using multiple high speed serial lines to transmit high data rates while compensating for overall skew113US 6,167,077 ALSI Logic Corporation · 2000
- Method and apparatus for parallel high speed data transfer85US 5,872,959 ALSI Logic Corporation · 1999
- Apparatus and method for adaptive jitter buffers85US 6,683,889 B1Siemens Information and Communication Networks, Inc. · 2004