Dual path clock forwarding

An integrated retimer circuit that comprises:

• a sampling element configured to produce a digital receive signal by sampling an analog receive signal in accordance with a sampling signal;
• a timing error estimator configured to produce a timing error signal indicating an estimated timing error of the sampling signal relative to the analog receive signal;
• a clock recovery circuit configured to derive the sampling signal from the estimated timing error and a reference clock in part by determining a frequency signal;
• a transmitter configured to retransmit the digital receive signal in accordance with a transmit clock;
• and
• a transmit clock generator configured to derive the transmit clock based on each of:
• the reference clock;
• the frequency signal;
• and
• a phase error of the transmit clock relative to the sampling signal,
• wherein the transmit clock generator includes a clock forwarding filter having:
• a phase comparator to determine the phase error;
• a phase filter coupled to the phase comparator to derive a filtered phase error;
• and
• a frequency filter to derive a filtered frequency signal.