H03M 13/114
Shuffled, staggered, layered or turbo decoding schedules
Official title: {Shuffled, staggered, layered or turbo decoding schedules}
H03M13/114 (Shuffled, staggered, layered or turbo decoding schedules) appears on 364 US grants and 364 published applications in this corpus.
Search patents in H03M- Granted patents
- 364
- Published applications
- 364
- Assignees
- 169
- Inventors
- 613
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2003 | 0 | 1 |
| 2004 | 0 | 3 |
| 2005 | 0 | 9 |
| 2006 | 0 | 7 |
| 2007 | 5 | 7 |
| 2008 | 4 | 16 |
| 2009 | 7 | 14 |
| 2010 | 9 | 24 |
| 2011 | 12 | 22 |
| 2012 | 31 | 11 |
| 2013 | 37 | 23 |
| 2014 | 30 | 25 |
| 2015 | 29 | 16 |
| 2016 | 26 | 27 |
| 2017 | 24 | 15 |
| 2018 | 9 | 19 |
| 2019 | 24 | 26 |
| 2020 | 27 | 18 |
| 2021 | 22 | 14 |
| 2022 | 19 | 17 |
| 2023 | 13 | 15 |
| 2024 | 17 | 12 |
| 2025 | 12 | 13 |
| 2026 | 7 | 10 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- Communication techniques involving pairwise orthogonality of adjacent rows in LPDC code22 Sep 2026US RE51,040 E1QUALCOMM Incorporated
- Network node and method performed therein for handling communication11 Aug 2026US 12,706,613 B2Telefonaktiebolaget LM Ericsson (publ)
- Hardware optimization device and method for low-density parity check decoder21 Jul 2026US 12,689,390 B2Electronics and Telecommunications Research Institute
- On-the-fly CRC calculation for a horizontal layered LDPC decoder21 Apr 2026US 12,609,716 B2SK hynix Inc.
- LDPC decoder and minimum value searching method3 Mar 2026US 12,567,872 B2Realtek Singapore Private Limited
- Concatetation of channel codes in finite block length regimes13 Aug 2026US 2026/0238231 A1Lenovo (United States) Inc.
- Decoder, and memory system for obtaining an updated posterior messages corresponding to a non-zero sub-matrix23 Jul 2026US 2026/0211809 A1Yangtze Memory Technologies Co., Ltd.
- Multi-channel decoder with distributed scheduling18 Jun 2026US 2026/0172052 A1MaxLinear, Inc.
- 5g-compatible ldpc decoder for satellite communications4 Jun 2026US 2026/0155835 A1Airbus Defence and Space GmbH
- Ldpc decoder with a multi-core architecture28 May 2026US 2026/0149467 A1Airbus Defence and Space GmbH
Most cited
By later US patents
- FEC (Forward Error Correction) decoder with dynamic parameters169US 7,257,764 B2Broadcom Corporation · 2007
- Structured low-density parity-check (LDPC) code92US 7,996,746 B2Nortel Networks Limited · 2011
- Layered decoding approach for low density parity check (LDPC) codes61US 7,181,676 B2Texas Instruments Incorporated · 2007
- Apparatus and method for decoding using channel code60US 8,438,459 B2LG Electronics Inc. · 2013
- Encoder and decoder by LDPC coding55US 8,140,930 B1NEC Corporation · 2012