H03K 5/15033
Using a chain of bistable devices
Official title: {using a chain of bistable devices}
H03K5/15033 (Using a chain of bistable devices) appears on 28 US grants and 16 published applications in this corpus.
Search patents in H03K- Granted patents
- 28
- Published applications
- 16
- Assignees
- 25
- Inventors
- 53
- Latest grant
- 16 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 0 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 0 | 0 |
| 1991 | 1 | 0 |
| 1992 | 1 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 1 | 0 |
| 2000 | 0 | 0 |
| 2001 | 1 | 0 |
| 2002 | 0 | 0 |
| 2003 | 1 | 1 |
| 2004 | 0 | 0 |
| 2005 | 0 | 0 |
| 2006 | 0 | 0 |
| 2007 | 0 | 2 |
| 2008 | 1 | 0 |
| 2009 | 1 | 3 |
| 2010 | 0 | 1 |
| 2011 | 2 | 0 |
| 2012 | 1 | 0 |
| 2013 | 0 | 0 |
| 2014 | 1 | 1 |
| 2015 | 3 | 0 |
| 2016 | 0 | 1 |
| 2017 | 2 | 1 |
| 2018 | 1 | 3 |
| 2019 | 2 | 1 |
| 2020 | 2 | 0 |
| 2021 | 0 | 0 |
| 2022 | 0 | 0 |
| 2023 | 1 | 0 |
| 2024 | 0 | 2 |
| 2025 | 1 | 0 |
| 2026 | 1 | 0 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Apparatus and method for generating circuit clock signal16 Jun 2026US 12,658,897 B2Beijing Youzhuju Network Technology Co., Ltd.
- Low-power inter-die communication using delay lines1 Apr 2025US 12,267,075 B2QUALCOMM Incorporated
- Low-power inter-die communication using delay lines4 Jul 2023US 11,695,400 B1QUALCOMM Incorporated
- Clocking circuit and method for time-interleaved analog-to-digital converters29 Sep 2020US 10,790,845 B1The Boeing Company
- Asynchronous clock signal generator and semiconductor device for correcting multi-phase signals using asynchronous clock signal18 Feb 2020US 10,566,961 B2Korea Advanced Institute of Science and Technology
- Apparatus and method for generating circuit clock signal12 Sep 2024US 2024/0305284 A1Beijing Youzhuju Network Technology Co., Ltd.
- Low-power inter-die communication using delay lines15 Feb 2024US 2024/0056067 A1QUALCOMM Incorporated
- Asynchronous clock signal generator and semiconductor device for correcting multi-phase signals using asynchronous clock signal13 Jun 2019US 2019/0181846 A1Korea Advanced Institute of Science and Technology
- Folded divider architecture20 Dec 2018US 2018/0367129 A1STMicroelectronics Asia Pacific Pte Ltd
- Asynchronous clock signal generator and semiconductor device for correcting multi-phase signals using asynchronous clock signal21 Jun 2018US 2018/0175843 A1Korea Advanced Institute of Science and Technology
Most cited
By later US patents
- Timing generator circuit including adjustable tapped delay line within phase lock loop to control timing of signals in the tapped delay line42US 5,159,205 ABurr-Brown Corporation · 1992
- Clock generator which generates a non-overlap clock having fixed pulse width and changeable frequency24US 4,877,974 AMitsubishi Denki Kabushiki Kaisha · 1989
- FET load gate compensator19US 3,996,481 AInternational Business Machines Corporation · 1976
- Apparatus and method for producing a plurality of output signals with fixed phase relationships therebetween14US 6,253,066 B1Motorola, Inc. · 2001
- Apparatus and method for producing a plurality of output signals with fixed phase relationships therebetween12US 5,930,689 AMotorola, Inc. · 1999