G06F 7/525
In serial-serial fashion, i.e. both operands being entered serially
Official title: in serial-serial fashion, i.e. both operands being entered serially (G06F7/533 takes precedence)
G06F7/525 (In serial-serial fashion, i.e. both operands being entered serially) appears on 27 US grants and 13 published applications in this corpus.
Search patents in G06F- Granted patents
- 27
- Published applications
- 13
- Assignees
- 23
- Inventors
- 55
- Latest grant
- 19 Mar 2024
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 4 | 0 |
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 3 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 1 | 0 |
| 1989 | 2 | 0 |
| 1990 | 0 | 0 |
| 1991 | 2 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 2 | 0 |
| 2003 | 1 | 0 |
| 2004 | 0 | 0 |
| 2005 | 0 | 0 |
| 2006 | 0 | 1 |
| 2007 | 0 | 0 |
| 2008 | 0 | 0 |
| 2009 | 0 | 1 |
| 2010 | 1 | 0 |
| 2011 | 1 | 0 |
| 2012 | 0 | 0 |
| 2013 | 0 | 1 |
| 2014 | 0 | 1 |
| 2015 | 1 | 2 |
| 2016 | 2 | 0 |
| 2017 | 1 | 1 |
| 2018 | 1 | 1 |
| 2019 | 1 | 0 |
| 2020 | 0 | 1 |
| 2021 | 0 | 1 |
| 2022 | 1 | 1 |
| 2023 | 0 | 0 |
| 2024 | 1 | 1 |
| 2025 | 0 | 0 |
| 2026 | 0 | 1 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Counter-based multiplication using processing in memory19 Mar 2024US 11,934,798 B2Micron Technology, Inc.
- Protection of an iterative calculation27 Sep 2022US 11,456,853 B2STMicroelectronics (Rousset) SAS
- Bit-serial multiplier for FPGA applications30 Apr 2019US 10,275,219 B2Embry-Riddle Aeronautical University, Inc.
- Apparatus and method for vector instructions for large integer arithmetic31 Jul 2018US 10,037,210 B2Intel Corporation
- Technique for performing arbitrary width integer arithmetic operations using fixed width elements21 Mar 2017US 9,600,235 B2NVIDIA Corporation
- Arithmetic circuitry, memory system, and method of controlling non-volatile memory29 Jan 2026US 2026/0029990 A1Kioxia Corporation
- Counter-based multiplication using processing in memory4 Jul 2024US 2024/0220205 A1Micron Technology, Inc.
- Floating point multiply-accumulate unit for deep learning16 Jun 2022US 2022/0188075 A1Intel Corporation
- Counter-based multiplication using processing in memory30 Sep 2021US 2021/0303265 A1Micron Technology, Inc.
- Protection of an iterative calculation1 Oct 2020US 2020/0313846 A1STMicroelectronics (Rousset) SAS
Most cited
By later US patents
- FPGA implemented bit-serial multiplier and infinite impulse response89US 6,438,570 B1Xilinx, Inc. · 2002
- Pipeline-type serial multiplier circuit73US 4,994,997 AU. S. Philips Corporation · 1991
- Digital data processor for matrix-vector multiplication38US 4,777,614 ANational Research Development Corporation · 1988
- Integrated arithmetic unit and digital networks using the unit23US 4,128,890 AGeneral Electric Company · 1978
- Signed double precision multiplication logic21US 4,135,249 AGeneral Electric Company · 1979