Counter-based multiplication using processing in memory
AssigneeMicron Technology, Inc.
InventorDmitri Yudanov
Life of this patent
Estimating the term…
Abstract
The present disclosure is directed to systems and methods for a memory device such as, for example, a Processing-In-Memory Device that is configured to perform multiplication operations in memory using a popcount operation. A multiplication operation may include a summation of multipliers being multiplied with corresponding multiplicands. The inputs may be arranged in particular configurations within a memory array. Sense amplifiers may be used to perform the popcount by counting active bits along bit lines. One or more registers may accumulate results for performing the multiplication operations.
Claims20
A device, comprising:
- at least one memory array;
- and
- a plurality of memory cells of the at least one memory array, the plurality of memory cells accessible via a plurality of bit lines and a plurality of word lines,
- wherein the device is configured to store at least one multiplicand or multiplier in the memory array, and
- wherein the device is configured to generate a sum of the at least one multiplicand or multiplier based on an operation performed on the at least one multiplicand or multiplier.
An apparatus comprising:
- a memory array having a plurality of memory cells accessible via a plurality of bit lines and a plurality of word lines;
- a controller connected to each of the plurality of word lines;
- and
- a plurality of sense amplifiers, each of the plurality of sense amplifiers connected to one of the plurality of bit lines.
An apparatus comprising:
- a memory array having a plurality of memory cells accessible via a plurality of bit lines and a plurality of word lines;
- a controller connected to each of the plurality of word lines;
- and
- a plurality of sense amplifiers, each of the plurality of sense amplifiers connected to two of the plurality of bit lines.
Dependencies are inferred from the claim text.