G06F 13/423
With synchronous protocol
Official title: {with synchronous protocol}
G06F13/423 (With synchronous protocol) appears on 503 US grants and 323 published applications in this corpus.
Search patents in G06F- Granted patents
- 503
- Published applications
- 323
- Assignees
- 225
- Inventors
- 974
- Latest grant
- 14 Jul 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 4 | 0 |
| 1978 | 2 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 2 | 0 |
| 1982 | 1 | 0 |
| 1983 | 3 | 0 |
| 1984 | 6 | 0 |
| 1985 | 3 | 0 |
| 1986 | 3 | 0 |
| 1987 | 4 | 0 |
| 1988 | 3 | 0 |
| 1989 | 7 | 0 |
| 1990 | 8 | 0 |
| 1991 | 3 | 0 |
| 1992 | 2 | 0 |
| 1993 | 8 | 0 |
| 1994 | 5 | 0 |
| 1995 | 13 | 0 |
| 1996 | 17 | 0 |
| 1997 | 15 | 0 |
| 1998 | 19 | 0 |
| 1999 | 15 | 0 |
| 2000 | 10 | 0 |
| 2001 | 16 | 4 |
| 2002 | 16 | 13 |
| 2003 | 8 | 21 |
| 2004 | 22 | 18 |
| 2005 | 17 | 24 |
| 2006 | 18 | 18 |
| 2007 | 19 | 18 |
| 2008 | 15 | 13 |
| 2009 | 16 | 11 |
| 2010 | 15 | 10 |
| 2011 | 13 | 3 |
| 2012 | 5 | 17 |
| 2013 | 3 | 24 |
| 2014 | 28 | 14 |
| 2015 | 21 | 25 |
| 2016 | 18 | 5 |
| 2017 | 16 | 7 |
| 2018 | 10 | 8 |
| 2019 | 7 | 6 |
| 2020 | 10 | 9 |
| 2021 | 6 | 8 |
| 2022 | 8 | 11 |
| 2023 | 15 | 16 |
| 2024 | 15 | 7 |
| 2025 | 9 | 8 |
| 2026 | 3 | 5 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
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- Method for controlling a target memory by programmably selecting an action execution circuit module corresponding to a triggered preset state16 Jun 2026US 12,657,140 B2Nanjing Tenafe Electronic Technology Co., Ltd.
- Communication link initiation method and apparatus7 Apr 2026US 12,598,016 B2Shenzhen Yinwang Intelligent Technologies Co., Ltd.
- Power-on-reset signal isolation during lower power mode9 Dec 2025US 12,493,340 B2Texas Instruments Incorporated
- Asynchronous bridge, and asynchronous processing method2 Sep 2025US 12,405,913 B2Nuvoton Technology Corporation
- Clock-to-data synchronization1 Oct 2026US 2026/0299641 A1NVIDIA Corporation
- Pcie retimer, pcie system and electronic device27 Aug 2026US 2026/0252520 A1Silicon Innovation Microelectronics Co., Ltd.
- Communication Link Initiation Method and Apparatus16 Jul 2026US 2026/0205219 A1Yinwang Intelligent Technologies Co., Ltd.
- Dynamic Timing Calibration Systems and Methods2 Apr 2026US 2026/0093649 A1Google Inc.
- Motherboard device and method for detecting add-in card of motherboard device26 Feb 2026US 2026/0056900 A1Wistron Corporation
Most cited
By later US patents
- System having independently addressable bus interfaces coupled to serially connected multi-ported signal distributors generating and maintaining frame based polling schedule favoring isochronous peripherals478US 5,615,404 AIntel Corporation · 1997
- Interface between a microprocessor chip and peripheral subsystems206US 4,315,308 AIntel Corporation · 1982
- Re-linked portable data terminal controller system173US 4,247,908 AMotorola, Inc. · 1981
- Method and apparatus for evaluating and optimizing a signaling system146US 7,490,275 B2Rambus Inc. · 2009
- Addressing technique for storing and referencing packet data125US 5,477,541 A1995