Pcie retimer, pcie system and electronic device

A peripheral component interconnect express (PCIe) retimer, comprising a deskewing unit, a processing unit, N decoding-descrambling units and N encoding-scrambling units, wherein

• an input terminal of an i-th decoding-descrambling unit of the N decoding-descrambling units is connected to an i-th ingress lane, an output terminal of the i-th decoding-descrambling unit is connected to an i-th input terminal of the processing unit and an i-th input terminal of the deskewing unit, an i-th output terminal of the deskewing unit is connected to an input terminal of an i-th encoding-scrambling unit of the N encoding-scrambling units, and an output terminal of the i-th encoding-scrambling unit is connected to an i-th egress lane, wherein 1≤i≤N, and the processing unit is connected to the deskewing unit;
• a decoding-descrambling unit of the N decoding-descrambling units is configured to receive data inputted via an ingress lane connected to the decoding-descrambling unit, to perform decoding-descrambling processing, and to output a decoded and descrambled data stream;
• the processing unit is configured to determine, based on the data stream outputted by each decoding-descrambling unit of the N decoding-descrambling units, a channel delay skew compensation for a channel, and to transmit the channel delay skew compensation to the deskewing unit, wherein the channel comprises one ingress lane and one egress lane;
• the deskewing unit is configured to perform deskew processing on the decoded and descrambled data stream based on the channel delay skew compensation, and to output a deskewed data stream;
• and
• an encoding-scrambling unit of the N encoding-scrambling unit is configured to perform encoding-scrambling processing on the received deskewed data stream, and to output an encoded and scrambled data stream.