G06F 12/126
With special data handling
Official title: with special data handling, e.g. priority of data or instructions, handling errors or pinning
G06F12/126 (With special data handling) appears on 1,763 US grants and 1,726 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,763
- Published applications
- 1,726
- Assignees
- 340
- Inventors
- 3,583
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 0 | 0 |
| 1978 | 2 | 0 |
| 1979 | 1 | 0 |
| 1980 | 1 | 0 |
| 1981 | 2 | 0 |
| 1982 | 3 | 0 |
| 1983 | 1 | 0 |
| 1984 | 2 | 0 |
| 1985 | 6 | 0 |
| 1986 | 0 | 0 |
| 1987 | 3 | 0 |
| 1988 | 3 | 0 |
| 1989 | 3 | 0 |
| 1990 | 7 | 0 |
| 1991 | 4 | 0 |
| 1992 | 1 | 0 |
| 1993 | 5 | 0 |
| 1994 | 8 | 0 |
| 1995 | 6 | 0 |
| 1996 | 19 | 0 |
| 1997 | 8 | 0 |
| 1998 | 20 | 0 |
| 1999 | 24 | 0 |
| 2000 | 22 | 0 |
| 2001 | 20 | 2 |
| 2002 | 31 | 25 |
| 2003 | 26 | 24 |
| 2004 | 29 | 62 |
| 2005 | 26 | 43 |
| 2006 | 39 | 55 |
| 2007 | 35 | 45 |
| 2008 | 48 | 72 |
| 2009 | 44 | 49 |
| 2010 | 51 | 60 |
| 2011 | 43 | 26 |
| 2012 | 51 | 55 |
| 2013 | 56 | 93 |
| 2014 | 58 | 80 |
| 2015 | 80 | 75 |
| 2016 | 83 | 62 |
| 2017 | 86 | 82 |
| 2018 | 82 | 83 |
| 2019 | 96 | 110 |
| 2020 | 97 | 126 |
| 2021 | 106 | 78 |
| 2022 | 97 | 82 |
| 2023 | 90 | 108 |
| 2024 | 88 | 92 |
| 2025 | 98 | 82 |
| 2026 | 50 | 55 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Address range based memory hints for prefetcher, cache and memory controller22 Sep 2026US 12,743,378 B2Google Inc.
- Prioritizing entries of an instruction fetch resource after stall-retirement events15 Sep 2026US 12,737,304 B2Intel Corporation
- Memory system and data processing system including the same25 Aug 2026US 12,717,579 B2SK hynix Inc.
- Dynamicaly adjusted cache policy and compression scheme for graphs processed by graph neural networks21 Jul 2026US 12,688,128 B2Intel Corporation
- Processors with toggleable memory tagging extensions and related methods14 Jul 2026US 12,681,865 B2Ampere Computing LLC
- Cache data replacement method and related device8 Oct 2026US 2026/0310611 A1Huawei Technologies Co., Ltd.
- Cache data management in multicore systems1 Oct 2026US 2026/0300176 A1Advanced Micro Devices, Inc.
- Methods and apparatus for eviction in dual datapath victim cache system1 Oct 2026US 2026/0300187 A1
- Processors with toggleable memory tagging extensions and related methods24 Sep 2026US 2026/0288645 A1Ampere Computing LLC
- Methods and apparatus to facilitate read-modify-write support in a victim cache17 Sep 2026US 2026/0277825 A1
Most cited
By later US patents
- Preloading data in a cache memory according to user-specified preload criteria310US 6,463,509 B1Motive Power, Inc. · 2002
- Predictive cache system285US 5,305,389 ADigital Equipment Corporation · 1994
- Method and apparatus for fast and consistent packet classification via efficient hash-caching217US 6,754,662 B1Nortel Networks Limited · 2004
- Cache with finely granular locked-down regions212US 6,044,478 ANational Semiconductor Corporation · 2000
- Outboard file cache system187US 5,809,527 AUnisys Corporation · 1998