G06F 12/0882
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G06F12/0882 (Page mode) appears on 789 US grants and 832 published applications in this corpus.
Search patents in G06F- Granted patents
- 789
- Published applications
- 832
- Assignees
- 152
- Inventors
- 1,563
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1987 | 1 | 0 |
| 1988 | 4 | 0 |
| 1989 | 1 | 0 |
| 1990 | 0 | 0 |
| 1991 | 1 | 0 |
| 1992 | 1 | 0 |
| 1993 | 2 | 0 |
| 1994 | 1 | 0 |
| 1995 | 1 | 0 |
| 1996 | 7 | 0 |
| 1997 | 8 | 0 |
| 1998 | 2 | 0 |
| 1999 | 1 | 0 |
| 2000 | 7 | 0 |
| 2001 | 3 | 2 |
| 2002 | 4 | 4 |
| 2003 | 3 | 1 |
| 2004 | 5 | 8 |
| 2005 | 3 | 4 |
| 2006 | 4 | 2 |
| 2007 | 4 | 2 |
| 2008 | 3 | 8 |
| 2009 | 2 | 2 |
| 2010 | 2 | 5 |
| 2011 | 4 | 5 |
| 2012 | 6 | 6 |
| 2013 | 3 | 7 |
| 2014 | 6 | 6 |
| 2015 | 9 | 19 |
| 2016 | 14 | 4 |
| 2017 | 12 | 11 |
| 2018 | 9 | 14 |
| 2019 | 9 | 28 |
| 2020 | 27 | 112 |
| 2021 | 98 | 171 |
| 2022 | 145 | 171 |
| 2023 | 151 | 87 |
| 2024 | 117 | 82 |
| 2025 | 73 | 46 |
| 2026 | 36 | 25 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Cache structure and utilization6 Oct 2026US 12,754,876 B2Intel Corporation
- Memory access statistics monitoring22 Sep 2026US 12,743,370 B2Micron Technology, Inc.
- Caching a memory descriptor for plural input/output requests22 Sep 2026US 12,743,380 B2Microsoft Technology Licensing, LLC
- Systems and methods for updating memory side caches in a multi-GPU configuration15 Sep 2026US 12,737,317 B2Intel Corporation
- Cache structure and utilization15 Sep 2026US 12,737,318 B2Intel Corporation
- Handling parity data during data folding in a memory device8 Oct 2026US 2026/0310550 A1
- Data storage device for managing page status information, operating method of the data storage device, and memory controller for the data storage device1 Oct 2026US 2026/0300161 A1SK hynix Inc.
- Techniques for a fragment cursor24 Sep 2026US 2026/0288633 A1Micron Technology, Inc.
- Hardware assisted Page Migration in a Multi-Dielet Processing System17 Sep 2026US 2026/0277809 A1NVIDIA Corporation
- Memory buffer pool maintenance method, device, system, and storage medium30 Jul 2026US 2026/0220049 A1Cloud Intelligence Assets Holding (Singapore) Private Limited
Most cited
By later US patents
- Product for global updating modified data object represented in concatenated multiple virtual space by segment mapping203US 5,687,343 AInternational Business Machines Corporation · 1997
- Method to control I/O accesses in a multi-tasking virtual memory virtual machine type data processing system126US 4,742,447 AInternational Business Machines Corporation · 1988
- Systems and methods for the efficient reading of data in a server system110US 7,237,061 B1RealNetworks, Inc. · 2007
- Main memory bank indexing scheme that optimizes consecutive page hits by linking main memory bank address organization to cache memory address organization99US 6,070,227 AHewlett-Packard Company · 2000
- Fast and compact address bit routing scheme that supports various DRAM bank sizes and multiple interleaving schemes94US 6,108,745 AHewlett-Packard Company · 2000