G06F 12/0804
With main memory updating
Official title: with main memory updating (G06F12/0806 takes precedence)
G06F12/0804 (With main memory updating) appears on 3,024 US grants and 2,929 published applications in this corpus.
Search patents in G06F- Granted patents
- 3,024
- Published applications
- 2,929
- Assignees
- 533
- Inventors
- 5,275
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 0 | 0 |
| 1978 | 1 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 1 | 0 |
| 1982 | 1 | 0 |
| 1983 | 2 | 0 |
| 1984 | 3 | 0 |
| 1985 | 6 | 0 |
| 1986 | 0 | 0 |
| 1987 | 5 | 0 |
| 1988 | 4 | 0 |
| 1989 | 7 | 0 |
| 1990 | 3 | 0 |
| 1991 | 5 | 0 |
| 1992 | 7 | 0 |
| 1993 | 9 | 0 |
| 1994 | 19 | 0 |
| 1995 | 28 | 0 |
| 1996 | 29 | 0 |
| 1997 | 32 | 0 |
| 1998 | 48 | 0 |
| 1999 | 35 | 0 |
| 2000 | 22 | 0 |
| 2001 | 32 | 9 |
| 2002 | 36 | 27 |
| 2003 | 33 | 42 |
| 2004 | 36 | 77 |
| 2005 | 39 | 61 |
| 2006 | 50 | 66 |
| 2007 | 41 | 73 |
| 2008 | 69 | 107 |
| 2009 | 69 | 86 |
| 2010 | 55 | 96 |
| 2011 | 86 | 81 |
| 2012 | 97 | 103 |
| 2013 | 113 | 105 |
| 2014 | 99 | 180 |
| 2015 | 146 | 126 |
| 2016 | 185 | 177 |
| 2017 | 185 | 210 |
| 2018 | 166 | 207 |
| 2019 | 192 | 208 |
| 2020 | 218 | 201 |
| 2021 | 175 | 163 |
| 2022 | 171 | 146 |
| 2023 | 167 | 136 |
| 2024 | 146 | 113 |
| 2025 | 95 | 80 |
| 2026 | 53 | 49 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- System and method for persisting hardware transactional memory transactions to persistent memory6 Oct 2026US 12,754,842 B1
- Cache structure and utilization6 Oct 2026US 12,754,876 B2Intel Corporation
- Storage replication group membership updates based on performance considerations22 Sep 2026US 12,743,224 B2Everpure, Inc.
- Systems and methods for updating memory side caches in a multi-GPU configuration15 Sep 2026US 12,737,317 B2Intel Corporation
- Cache structure and utilization15 Sep 2026US 12,737,318 B2Intel Corporation
- System and method of writing to nonvolatile memory using write buffers1 Oct 2026US 2026/0299829 A1Kioxia Corporation
- System and method for implementing quires using a memory controller1 Oct 2026US 2026/0299945 A1Tactical Computing Laboratories, LLC
- Data storage device for managing page status information, operating method of the data storage device, and memory controller for the data storage device1 Oct 2026US 2026/0300161 A1SK hynix Inc.
- Method for copying data within memory device, memory device, and electronic device thereof1 Oct 2026US 2026/0300174 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Methods and apparatus for eviction in dual datapath victim cache system1 Oct 2026US 2026/0300187 A1
Most cited
By later US patents
- Data processing system with mechanism for restoring file systems based on transaction logs784US 6,732,124 B1Fujitsu Limited · 2004
- Memory back-up system734US 4,654,819 ASequoia Systems, Inc. · 1987
- Flash eeprom system602US 5,297,148 ASunDisk Corporation · 1994
- System and method for secure and reliable multi-cloud data replication579US 8,762,642 B2Twinstrata, Inc · 2014
- Flash EEprom system524US 5,602,987 ASanDisk Corporation · 1997