G06F 12/0292
Using tables or multilevel address translation means
Official title: {using tables or multilevel address translation means (G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10)}
G06F12/0292 (Using tables or multilevel address translation means) appears on 1,676 US grants and 1,606 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,676
- Published applications
- 1,606
- Assignees
- 404
- Inventors
- 3,376
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 6 | 0 |
| 1977 | 2 | 0 |
| 1978 | 3 | 0 |
| 1979 | 2 | 0 |
| 1980 | 2 | 0 |
| 1981 | 4 | 0 |
| 1982 | 1 | 0 |
| 1983 | 6 | 0 |
| 1984 | 4 | 0 |
| 1985 | 8 | 0 |
| 1986 | 4 | 0 |
| 1987 | 5 | 0 |
| 1988 | 9 | 0 |
| 1989 | 8 | 0 |
| 1990 | 12 | 0 |
| 1991 | 7 | 0 |
| 1992 | 6 | 0 |
| 1993 | 9 | 0 |
| 1994 | 9 | 0 |
| 1995 | 10 | 0 |
| 1996 | 23 | 0 |
| 1997 | 16 | 0 |
| 1998 | 23 | 0 |
| 1999 | 18 | 0 |
| 2000 | 11 | 0 |
| 2001 | 15 | 3 |
| 2002 | 23 | 27 |
| 2003 | 20 | 18 |
| 2004 | 25 | 24 |
| 2005 | 23 | 20 |
| 2006 | 9 | 12 |
| 2007 | 18 | 20 |
| 2008 | 9 | 25 |
| 2009 | 11 | 20 |
| 2010 | 23 | 18 |
| 2011 | 24 | 33 |
| 2012 | 17 | 27 |
| 2013 | 22 | 50 |
| 2014 | 39 | 81 |
| 2015 | 85 | 54 |
| 2016 | 69 | 48 |
| 2017 | 72 | 70 |
| 2018 | 69 | 80 |
| 2019 | 85 | 100 |
| 2020 | 97 | 128 |
| 2021 | 92 | 126 |
| 2022 | 127 | 130 |
| 2023 | 135 | 136 |
| 2024 | 127 | 143 |
| 2025 | 152 | 126 |
| 2026 | 80 | 87 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Garbage collection using detail card tables6 Oct 2026US 12,754,838 B2Oracle International Corporation
- Computer device, data processing method, and computer system for performing persistent storage on data6 Oct 2026US 12,754,839 B2xFusion Digital Technologies Co., Ltd
- Staged undefined object memory and bandwidth bloat heterogeneity correction6 Oct 2026US 12,754,973 B1The Huntington National Bank
- Address translation in a memory sub-system for memory pooling29 Sep 2026US 12,748,692 B2Micron Technology, Inc.
- Storage device, method of operating storage device, and storage system including the storage device29 Sep 2026US 12,748,693 B2Samsung Electronics Co., Ltd.
- Methods and systems for metadata reduction in paged direct mapping key-value stores8 Oct 2026US 2026/0310600 A1QiStor Inc.
- Garbage collection for flash translation layer tables1 Oct 2026US 2026/0300166 A1Micron Technology, Inc.
- Multi-table distribution encoding1 Oct 2026US 2026/0300167 A1Microsoft Technology Licensing, LLC
- Method of flexible address mapping for utilizing processing-in-memory and apparatus therefor1 Oct 2026US 2026/0300168 A1Seoul National University R&Db Foundation
- Storage device including nonvolatile memory device and operating method of storage device1 Oct 2026US 2026/0300169 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Flash memory mass storage architecture incorporating wear leveling technique without using cam cells376US 5,485,595 ACirrus Logic, Inc. · 1996
- Flash memory mass storage architecture incorporation wear leveling technique364US 5,479,638 ACirrus Logic, Inc. · 1995
- System and method for managing trim operations in a flash memory system using mapping tables and block status tables334US 9,323,667 B2Violin Memory, Inc. · 2016
- Memory controller for a microprocessor for detecting a failure of speculation on the physical nature of a component being addressed230US 5,832,205 ATransmeta Corporation · 1998
- Product for global updating modified data object represented in concatenated multiple virtual space by segment mapping203US 5,687,343 AInternational Business Machines Corporation · 1997