Memory controller for a microprocessor for detecting a failure of speculation on the physical nature of a component being addressed

A memory control system for a computer comprising:

• main memory,
• memory-mapped input/output (I/O) devices,
• memory control software for causing commands to affect operations at particular addresses,
• a translation lookaside buffer including memory locations for storing virtual addresses which have been recently accessed and translations of those virtual addresses to physical addresses within the computer,
• at least one memory position for each memory location recording an indication whether the address is assumed to be memory or memory-mapped I/O, a comparator for detecting whether an instruction accessing a virtual address stored in the translation lookaside buffer presumes that the physical address is the same as the indication recorded for the physical address.

A method of recovering from a failed speculation regarding a physical property of components accessed as memory in a computer system comprising the steps of:

• providing a process for recovering from an exception related to a failure of the existence of a property of components accessed as memory,
• generating an access to an address speculating on a property of a particular address,
• detecting failure of the speculation by comparing the speculation to the property of the component addressed, and
• responding to detection of a failure of the speculation by running the process.

A microprocessor comprising:

• a host processor capable of executing a first instruction set,
• code morphing software for translating programs written for a target processor having a second different instruction set into instructions of the first instruction set, and
• a memory controller comprising
• an address translation buffer including a plurality of storage locations in which recently accessed virtual target addresses and physical addresses represented by the virtual target addresses are to be recorded,
• each of the storage locations including means for indicating whether a physical address is a memory address or a memory-mapped input/output (I/O) address;
• and
• means for comparing an indication in a storage location with a speculation made that an access to a virtual target address in a storage location is to memory or memory-mapped I/O to indicate a subsequent operation to be taken in accessing the address.

A memory controller comprising

• an address translation buffer including a plurality of storage locations in which recently accessed virtual addresses and physical addresses represented by the virtual addresses are to be recorded,
• each of the storage locations including means for indicating whether a physical address is a memory address or a memory-mapped input/output (I/O) address;
• and
• means for comparing an indication in a storage location with a speculation made that an access to an address in a storage location is to memory or memory-mapped I/O to indicate a subsequent operation taken in accessing the address.