G06F 11/1679
At clock signal level
Official title: {at clock signal level}
G06F11/1679 (At clock signal level) appears on 224 US grants and 122 published applications in this corpus.
Search patents in G06F- Granted patents
- 224
- Published applications
- 122
- Assignees
- 92
- Inventors
- 434
- Latest grant
- 21 Jul 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 1 | 0 |
| 1986 | 3 | 0 |
| 1987 | 3 | 0 |
| 1988 | 1 | 0 |
| 1989 | 1 | 0 |
| 1990 | 5 | 0 |
| 1991 | 5 | 0 |
| 1992 | 6 | 0 |
| 1993 | 6 | 0 |
| 1994 | 11 | 0 |
| 1995 | 7 | 0 |
| 1996 | 8 | 0 |
| 1997 | 7 | 0 |
| 1998 | 11 | 0 |
| 1999 | 9 | 0 |
| 2000 | 11 | 0 |
| 2001 | 8 | 2 |
| 2002 | 4 | 4 |
| 2003 | 4 | 3 |
| 2004 | 2 | 9 |
| 2005 | 4 | 1 |
| 2006 | 3 | 6 |
| 2007 | 3 | 2 |
| 2008 | 3 | 5 |
| 2009 | 2 | 8 |
| 2010 | 6 | 6 |
| 2011 | 8 | 2 |
| 2012 | 3 | 5 |
| 2013 | 5 | 4 |
| 2014 | 6 | 7 |
| 2015 | 5 | 3 |
| 2016 | 4 | 7 |
| 2017 | 6 | 7 |
| 2018 | 8 | 7 |
| 2019 | 3 | 3 |
| 2020 | 4 | 13 |
| 2021 | 5 | 4 |
| 2022 | 7 | 5 |
| 2023 | 9 | 4 |
| 2024 | 5 | 5 |
| 2025 | 5 | 0 |
| 2026 | 4 | 0 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Integrated circuit chip with cores asymmetrically oriented with respect to each other21 Jul 2026US 12,688,097 B2Texas Instruments Incorporated
- Memory module, error correction method of memory controller controlling the same, and computing system including the same26 May 2026US RE50,902 E1Samsung Electronics Co., Ltd.
- Safety device and safety method24 Feb 2026US 12,561,216 B2Hitachi, Ltd.
- Synchronized snapshot in synchronous replication10 Feb 2026US 12,547,507 B1Vast Data Ltd.
- Simultaneous multi-processor apparatus applicable to achieving exascale performance for algorithms and program systems14 Oct 2025US 12,443,495 B1QSigma, Inc.
- Processing device and error detection method14 Nov 2024US 2024/0377854 A1Hitachi Information & Telecommunication Engineering, Ltd.
- Memory error detection5 Sep 2024US 2024/0296088 A1Rambus Inc.
- Security device and security method18 Jul 2024US 2024/0241804 A1Hitachi, Ltd.
- Techniques for duty cycle correction4 Apr 2024US 2024/0113700 A1Intel Corporation
- Error rate interrupts in hardware for high-speed signaling interconnect28 Mar 2024US 2024/0103951 A1NVIDIA Corporation
Most cited
By later US patents
- Multiple processor system having shared memory with private-write capability208US 4,965,717 ATandem Computers Incorporated · 1990
- Data processing system with system resource management for itself and for an associated alien processor168US 5,113,522 AInternational Business Machines Corporation · 1992
- Method of synchronizing a pair of central processor units for duplex, lock-step operation by copying data into a corresponding locations of another memory159US 5,751,955 ATandem Computers Incorporated · 1998
- Self-checked, lock step processor pairs152US 6,233,702 B1Compaq Computer Corporation · 2001
- Double redundant processor151US 4,358,823 ATRW Inc. · 1982