H03M 13/3723
Using means or methods for the initialisation of the decoder
Official title: {using means or methods for the initialisation of the decoder}
H03M13/3723 (Using means or methods for the initialisation of the decoder) appears on 311 US grants and 297 published applications in this corpus.
Search patents in H03M- Granted patents
- 311
- Published applications
- 297
- Assignees
- 141
- Inventors
- 634
- Latest grant
- 9 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1988 | 2 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 1 | 0 |
| 1996 | 3 | 0 |
| 1997 | 1 | 0 |
| 1998 | 3 | 0 |
| 1999 | 1 | 0 |
| 2000 | 1 | 0 |
| 2001 | 0 | 1 |
| 2002 | 2 | 7 |
| 2003 | 4 | 6 |
| 2004 | 4 | 3 |
| 2005 | 5 | 6 |
| 2006 | 4 | 6 |
| 2007 | 3 | 7 |
| 2008 | 5 | 8 |
| 2009 | 4 | 2 |
| 2010 | 5 | 4 |
| 2011 | 6 | 10 |
| 2012 | 9 | 8 |
| 2013 | 15 | 22 |
| 2014 | 23 | 25 |
| 2015 | 24 | 20 |
| 2016 | 26 | 20 |
| 2017 | 15 | 22 |
| 2018 | 21 | 26 |
| 2019 | 32 | 19 |
| 2020 | 25 | 24 |
| 2021 | 29 | 16 |
| 2022 | 9 | 6 |
| 2023 | 10 | 8 |
| 2024 | 9 | 9 |
| 2025 | 7 | 5 |
| 2026 | 3 | 7 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Low-density parity check (LDPC) decoders using partial syndrome early termination9 Jun 2026US 12,652,063 B2Avago Technologies International Sales Pte. Limited
- User equipment performing blind decoding and operating method thereof12 May 2026US 12,628,182 B2Samsung Electronics Co., Ltd.
- Error correction decoding device20 Jan 2026US 12,531,577 B2Mitsubishi Electric Corporation
- Method and apparatus for performing data access control for host device2 Dec 2025US 12,489,465 B2Silicon Motion, Inc.
- Decoder success predictor signaling for adjusting MIRS scheduling policy25 Nov 2025US 12,483,353 B2QUALCOMM Incorporated
- Hard error correction based on selective error counts in low-density parity check codes in memory devices23 Jul 2026US 2026/0213773 A1
- Learning-based min-sum hard decoding for non-volatile memory devices4 Jun 2026US 2026/0155836 A1
- Asymmetric hard read channel estimation in memory devices4 Jun 2026US 2026/0155839 A1
- Soft-biased successive cancellation list polar decoding26 Feb 2026US 2026/0058755 A1QUALCOMM Incorporated
- Decoder, decoding method, memory system and controller29 Jan 2026US 2026/0030094 A1Yangtze Memory Technologies Co., Ltd.
Most cited
By later US patents
- Disk drive employing a multiple-input sequence detector responsive to reliability metrics to improve a retry operation246US 6,405,342 B1Western Digital Technologies, Inc. · 2002
- Parallel concatenated tail-biting convolutional code and decoder therefor189US 5,721,745 AGeneral Electric Company · 1998
- Methods and apparatus for reducing error floors in message passing decoders86US 7,237,181 B2QUALCOMM Incorporated · 2007
- Method and system for decoding low density parity check codes80US 8,392,789 B2Texas Instruments Incorporated · 2013
- Method and device for decoding LDPC codes and communication apparatus including such device73US 8,291,284 B2Commissariat A L' Energie Atomique · 2012