G06F 7/49968
Rounding towards positive infinity
Official title: {Rounding towards positive infinity (G06F7/49957 takes precedence)}
G06F7/49968 (Rounding towards positive infinity) appears on 24 US grants and 21 published applications in this corpus.
Search patents in G06F- Granted patents
- 24
- Published applications
- 21
- Assignees
- 9
- Inventors
- 33
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1996 | 1 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 1 | 0 |
| 2004 | 0 | 0 |
| 2005 | 0 | 0 |
| 2006 | 0 | 2 |
| 2007 | 0 | 0 |
| 2008 | 2 | 1 |
| 2009 | 0 | 1 |
| 2010 | 0 | 0 |
| 2011 | 1 | 0 |
| 2012 | 1 | 0 |
| 2013 | 1 | 1 |
| 2014 | 0 | 1 |
| 2015 | 2 | 0 |
| 2016 | 0 | 2 |
| 2017 | 2 | 1 |
| 2018 | 2 | 3 |
| 2019 | 1 | 3 |
| 2020 | 4 | 1 |
| 2021 | 0 | 3 |
| 2022 | 1 | 0 |
| 2023 | 3 | 2 |
| 2024 | 0 | 0 |
| 2025 | 1 | 0 |
| 2026 | 1 | 0 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Floating point fused multiply add with merged 2's complement and rounding22 Sep 2026US 12,743,251 B2Texas Instruments Incorporated
- Decimal floating-point instruction in a round-for-reround mode11 Feb 2025US 12,223,290 B2International Business Machines Corporation
- Enhanced low precision binary floating-point formatting3 Oct 2023US 11,775,257 B2International Business Machines Corporation
- Prepare for shorter precision (round for reround) mode in a decimal floating-point instruction11 Jul 2023US 11,698,772 B2International Business Machines Corporation
- Modular operation circuit adopting iterative calculations30 May 2023US 11,662,978 B2PUFsecurity Corporation
- Decimal floating-point round-for-reround instruction26 Oct 2023US 2023/0342112 A1International Business Machines Corporation
- Floating point fused multiply add with merged 2's complement and rounding6 Jul 2023US 2023/0214179 A1Texas Instruments Incorporated
- Modular operation circuit adopting iterative calculations9 Dec 2021US 2021/0382688 A1PUFsecurity Corporation
- Physical unclonable function based true random number generator, method for generating true random numbers, and associated electronic device9 Dec 2021US 2021/0385094 A1PUFsecurity Corporation
- Prepare for shorter precision (round for reround) mode in a decimal floating-point instruction7 Jan 2021US 2021/0004206 A1International Business Machines Corporation
Most cited
By later US patents
- Multiplier accumulator circuits96US 6,571,268 B1Texas Instruments Incorporated · 2003
- Multiplication circuit having rounding function71US 5,500,812 AMatsushita Electric Industrial Co., Ltd. · 1996
- Round for reround mode in a decimal floating point instruction19US 9,851,946 B2International Business Machines Corporation · 2017
- Processing unit having decimal floating-point divider using Newton-Raphson iteration17US 7,467,174 B2Wisconsin Alumni Research Foundation · 2008
- Method for controlling rounding modes in single instruction multiple data (SIMD) floating-point units15US 8,229,989 B2International Business Machines Corporation · 2012