Prepare for shorter precision (round for reround) mode in a decimal floating-point instruction
AssigneeInternational Business Machines Corporation
InventorsEric Mark Schwarz, Martin Stanley Schmookler
Life of this patent
Estimating the term…
Abstract
An instruction is executed in round-for-reround mode wherein the permissible resultant value that is closest to and no greater in magnitude than the infinitely precise result is selected. If the selected value is not exact and the units digit of the selected value is either 0 or 5, then the digit is incremented by one and the selected value is delivered. In all other cases, the selected value is delivered.
Claims25
A computer implemented method for indicating with any least significant decimal coefficient digit of 0 or 5 that a result of a rounding of a decimal floating-point (DFP) number to a lesser precision in a computer processor is an exact (precise) result, the method comprising:
- fetching a DFP round-for-reround instruction in a machine, the machine implementing a plurality of floating point registers and including the computer processor:
- executing, by the computer processor, the DFP round-for-reround instruction in a round-for-reround mode, wherein the DFP round-for-reround instruction is configured to perform a DFP operation on a DFP operand, the executing the DFP round-for-reround instruction comprising:
- based on being in the round-for-reround mode, forming, by the computer processor, from a decimal coefficient number having a high order portion and a low order portion, an intermediate result from the high order portion, wherein the intermediate result has a least significant decimal coefficient digit;
- without changing any coefficient digit of the intermediate result, other than the least significant decimal coefficient digit, creating from the intermediate result a rounded-for-reround DFP number, the creating comprising:
- based on the least significant coefficient digit of the intermediate result being 0 or 5 and based on the low order portion having any value other than 0, incrementing the least significant coefficient digit of the intermediate result;
- and
- storing in computer processor storage, by the computer processor, the intermediate result as a final result of the executed DFP operation, wherein the intermediate result is the rounded-for-reround DFP number, wherein a final result having a least significant digit of 0 or 5 indicates that the final result is exact and that the low order portion is 0, wherein a final result having a least significant digit of any one of 1, 2, 3, 4, 6, 7, 8 and 9 does not indicate that the final result is exact and does not indicate that the low order portion is 0.
A computer system for indicating with any least significant decimal coefficient digit of 0 or 5 that a result of a rounding of a decimal floating-point (DFP) number to a lesser precision in a computer processor is an exact (precise) result, the computer system comprising:
- an instruction fetching unit for fetching instructions to be executed;
- a floating point arithmetic unit for executing floating point operations for executing fetched floating point instructions;
- and
- an operand storage in communication with said floating point arithmetic unit;
- and
- a memory communicatively coupled to said computer processor, the computer system configured to perform a method comprising:
- executing, by the computer processor, a DFP round-for-reround instruction in a round-for-reround mode, wherein the DFP round-for-reround instruction is configured to perform a DFP operation on a DFP operand, the executing the DFP round-for-reround instruction comprising:
- based on being in the round-for-reround mode, forming, by the computer processor, from a decimal coefficient number having a high order portion and a low order portion, an intermediate result from the high order portion, wherein the intermediate result has a least significant decimal coefficient digit;
- without changing any coefficient digit of the intermediate result, other than the least significant decimal coefficient digit, creating from the intermediate result a rounded-for-reround DFP number, the creating comprising:
- based on the least significant coefficient digit of the intermediate result being 0 or 5 and based on the low order portion having any value other than 0, incrementing the least significant coefficient digit of the intermediate result;
- and
- based on the other low order portion being 0, leaving the least significant coefficient digit of the intermediate result unchanged;
- and
- storing in computer processor storage, by the computer processor, the intermediate result as a final result of the executed DFP operation, wherein the intermediate result is the rounded-for-reround DFP number, wherein a final result having a least significant digit of 0 or 5 indicates that the final result is exact and that the low order portion is 0, wherein a final result having a least significant digit of any one of 1, 2, 3, 4, 6, 7, 8 and 9 does not indicate that the final result is exact and does not indicate that the low order portion is 0.
A computer program product for indicating with any least significant decimal coefficient digit of 0 or 5 that a result of a rounding of a decimal floating-point (DFP) number to a lesser precision in a computer processor is an exact (precise) result, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, wherein the computer readable storage medium is not a transitory signal per se, the program instructions executable by the computer processor to cause the computer processor to perform a method comprising:
- fetching a DFP round-for-reround instruction in a machine, the machine implementing a plurality of floating point registers and including the computer processor;
- executing, by the computer processor, the DFP round-for-reround instruction in a round-for-reround mode, wherein the DFP round-for-reround instruction is configured to perform a DFP operation on a DFP operand, the executing the DFP round-for-reround instruction comprising:
- based on being in the round-for-reround mode, forming, by the computer processor, from a decimal coefficient number having a high order portion and a low order portion, an intermediate result from the high order portion, wherein the intermediate result has a least significant decimal coefficient digit;
- without changing any coefficient digit of the intermediate result, other than the least significant decimal coefficient digit, creating from the intermediate result a rounded-for-reround DFP number, the creating comprising:
- based on the least significant coefficient digit of the intermediate result being 0 or 5 and based on the low order portion having any value other than 0, incrementing the least significant coefficient digit of the intermediate result;
- and
- based on the other low order portion being 0, leaving the least significant coefficient digit of the intermediate result unchanged;
- and
- storing in computer processor storage, by the computer processor, the intermediate result as a final result of the executed DFP operation, wherein the intermediate result is the rounded-for-reround DFP number, wherein a final result having a least significant digit of 0 or 5 indicates that the final result is exact and that the low order portion is 0, wherein a final result having a least significant digit of any one of 1, 2, 3, 4, 6, 7, 8 and 9 does not indicate that the final result is exact and does not indicate that the low order portion is 0.
Dependencies are inferred from the claim text.