G06F 2213/16
Memory access
G06F2213/16 (Memory access) appears on 129 US grants and 165 published applications in this corpus.
Search patents in G06F- Granted patents
- 129
- Published applications
- 165
- Assignees
- 77
- Inventors
- 421
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2005 | 0 | 1 |
| 2006 | 0 | 0 |
| 2007 | 0 | 0 |
| 2008 | 0 | 0 |
| 2009 | 0 | 1 |
| 2010 | 1 | 2 |
| 2011 | 1 | 1 |
| 2012 | 2 | 1 |
| 2013 | 0 | 1 |
| 2014 | 2 | 3 |
| 2015 | 2 | 2 |
| 2016 | 2 | 0 |
| 2017 | 1 | 1 |
| 2018 | 1 | 10 |
| 2019 | 8 | 15 |
| 2020 | 13 | 17 |
| 2021 | 19 | 10 |
| 2022 | 13 | 18 |
| 2023 | 17 | 10 |
| 2024 | 9 | 27 |
| 2025 | 23 | 27 |
| 2026 | 15 | 18 |
By publication year. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Data storage accessible by a host using different communication protocols based on the mating orientation of a reversible connector6 Oct 2026US 12,754,834 B2SanDisk Technologies LLC
- Computing system architecture having efficient bus connections6 Oct 2026US 12,754,861 B2SK hynix Inc.
- Memory, operation method thereof and memory system1 Sep 2026US 12,724,721 B2Yangtze Memory Technologies Co., Ltd.
- Optimized prioritization of memory accesses25 Aug 2026US 12,717,729 B2Intel Corporation
- Event-based debug, trace, and profile in device with data processing engine array7 Jul 2026US 12,675,420 B1Xilinx, Inc.
- Bus node with a microcontroller emulating a memory chip27 Aug 2026US 2026/0252504 A1WAGO Verwaltungsgesellschaft mbH
- Memory-Centric Communication Operating Architecture with Unified System Domain and Admissibility-Governed Communication Constitution20 Aug 2026US 2026/0244581 A1LED Smart Inc.
- Secure data distribution in a microprocessor-based system-on-chip30 Jul 2026US 2026/0220055 A1Avago Technologies International Sales Pte. Limited
- High-speed communication method and apparatus of heterogeneous device and heterogeneous communication system23 Jul 2026US 2026/0211830 A1IEIT SYSTEMS (Beijing) Co., Ltd.
- Buffer chip for routing command/address and data signals to a stack of memory dies within a memory system2 Jul 2026US 2026/0186988 A1Micron Technology, Inc.
Most cited
By later US patents
- Multi-serial interface stacked-die memory architecture104US 7,978,721 B2Micron Technology, Inc. · 2011
- Storage system having an in-line hardware accelerator52US 10,956,346 B1Lightbits Labs Ltd. · 2021
- Multichip package link error detection15US 10,552,253 B2Intel Corporation · 2020
- Storage system and a method for application aware processing9US 10,963,393 B1Lightbits Labs Ltd. · 2021
- Method of organizing a programmable atomic unit instruction memory9US 11,403,023 B2Micron Technology, Inc. · 2022