G06F 15/786
Using a single memory module
Official title: {using a single memory module}
G06F15/786 (Using a single memory module) appears on 79 US grants and 21 published applications in this corpus.
Search patents in G06F- Granted patents
- 79
- Published applications
- 21
- Assignees
- 31
- Inventors
- 118
- Latest grant
- 18 Nov 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1982 | 2 | 0 |
| 1983 | 0 | 0 |
| 1984 | 3 | 0 |
| 1985 | 5 | 0 |
| 1986 | 4 | 0 |
| 1987 | 2 | 0 |
| 1988 | 1 | 0 |
| 1989 | 3 | 0 |
| 1990 | 3 | 0 |
| 1991 | 3 | 0 |
| 1992 | 2 | 0 |
| 1993 | 5 | 0 |
| 1994 | 2 | 0 |
| 1995 | 2 | 0 |
| 1996 | 6 | 0 |
| 1997 | 4 | 0 |
| 1998 | 7 | 0 |
| 1999 | 3 | 0 |
| 2000 | 4 | 0 |
| 2001 | 0 | 0 |
| 2002 | 1 | 1 |
| 2003 | 1 | 4 |
| 2004 | 1 | 1 |
| 2005 | 1 | 0 |
| 2006 | 2 | 1 |
| 2007 | 0 | 1 |
| 2008 | 0 | 1 |
| 2009 | 0 | 0 |
| 2010 | 0 | 0 |
| 2011 | 0 | 1 |
| 2012 | 0 | 0 |
| 2013 | 0 | 0 |
| 2014 | 0 | 1 |
| 2015 | 1 | 0 |
| 2016 | 0 | 1 |
| 2017 | 3 | 1 |
| 2018 | 1 | 0 |
| 2019 | 0 | 1 |
| 2020 | 1 | 0 |
| 2021 | 0 | 0 |
| 2022 | 0 | 5 |
| 2023 | 1 | 0 |
| 2024 | 3 | 2 |
| 2025 | 2 | 0 |
By publication year. Applications have been published since 2001.
Recent patents
- Electronic circuit that renders a changed FPGA usable without changing firmware18 Nov 2025US 12,475,077 B2Toshiba Tec Kabushiki Kaisha
- In-memory zero value detection4 Mar 2025US 12,242,381 B2NeuroBlade Ltd.
- Scalable acceleration of reentrant compute operations19 Nov 2024US 12,147,379 B2Xilinx, Inc.
- Distributed processor memory chip with multi-port processor subunits16 Jul 2024US 12,038,838 B2NeuroBlade Ltd.
- Compensating for DRAM activation penalties2 Jan 2024US 11,860,782 B2NeuroBlade Ltd.
- Electronic circuit25 Jul 2024US 2024/0248873 A1Toshiba Tec Kabushiki Kaisha
- Scalable acceleration of reentrant compute operations4 Jul 2024US 2024/0220444 A1Xilinx, Inc.
- Memory mat as a register file25 Aug 2022US 2022/0269645 A1NeuroBlade Ltd.
- In-memory zero value detection26 May 2022US 2022/0164284 A1NeuroBlade Ltd.
- Compensating for dram activation penalties26 May 2022US 2022/0164285 A1NeuroBlade Ltd.
Most cited
By later US patents
- System for dividing processing tasks into signal processor and decision-making microprocessor interfacing therewith177US 5,524,244 ALogic Devices, Inc. · 1996
- Processor condition sensing circuits, systems and methods110US 6,032,268 ATexas Instruments Incorporated · 2000
- Architectures and methods for dividing processing tasks into tasks for a programmable real time signal processor and tasks for a decision making microprocessor interfacing therewith103US 5,287,511 AStar Semiconductor Corporation · 1994
- Processor condition sensing circuits, systems and methods99US 5,535,331 ATexas Instruments Incorporated · 1996
- Microcomputer system for digital signal processing81US 4,577,282 ATexas Instruments Incorporated · 1986