G06F 13/1642
With request queuing
Official title: {with request queuing}
G06F13/1642 (With request queuing) appears on 1,111 US grants and 1,138 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,111
- Published applications
- 1,138
- Assignees
- 262
- Inventors
- 1,923
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1980 | 1 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 1 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 1 | 0 |
| 1992 | 1 | 0 |
| 1993 | 1 | 0 |
| 1994 | 3 | 0 |
| 1995 | 2 | 0 |
| 1996 | 1 | 0 |
| 1997 | 6 | 0 |
| 1998 | 6 | 0 |
| 1999 | 7 | 0 |
| 2000 | 7 | 0 |
| 2001 | 14 | 2 |
| 2002 | 13 | 6 |
| 2003 | 15 | 11 |
| 2004 | 13 | 17 |
| 2005 | 9 | 18 |
| 2006 | 14 | 16 |
| 2007 | 11 | 24 |
| 2008 | 17 | 21 |
| 2009 | 12 | 15 |
| 2010 | 13 | 14 |
| 2011 | 26 | 18 |
| 2012 | 23 | 21 |
| 2013 | 24 | 45 |
| 2014 | 25 | 54 |
| 2015 | 47 | 55 |
| 2016 | 56 | 57 |
| 2017 | 63 | 47 |
| 2018 | 56 | 75 |
| 2019 | 94 | 86 |
| 2020 | 85 | 88 |
| 2021 | 72 | 56 |
| 2022 | 63 | 100 |
| 2023 | 69 | 67 |
| 2024 | 99 | 80 |
| 2025 | 84 | 92 |
| 2026 | 53 | 53 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- System and method for facilitating dynamic command management in a network interface controller (NIC)6 Oct 2026US 12,754,857 B2Hewlett Packard Enterprise Development LP
- Memory device, memory system including the memory device, and operating method of the memory system6 Oct 2026US 12,754,858 B2Samsung Electronics Co., Ltd.
- I/O management using page-level aging6 Oct 2026US 12,754,859 B1Dell Products L. P.
- Dynamic memory power capping with criticality awareness29 Sep 2026US 12,748,620 B2Advanced Micro Devices, Inc.
- Firmware-controlled memory binding and implicit data persistence for hardware accelerators22 Sep 2026US 12,743,372 B1NVIDIA Corporation
- Methods and apparatus for eviction in dual datapath victim cache system1 Oct 2026US 2026/0300187 A1
- System and method for low latency packet processing24 Sep 2026US 2026/0288657 A1Mellanox Technologies, Ltd.
- Data storage device and operation method thereof17 Sep 2026US 2026/0277800 A1Korea Advanced Institute of Science and Technology
- Isolating garbage collection read operations in a memory sub-system17 Sep 2026US 2026/0277801 A1Micron Technology, Inc.
- Methods and apparatus to facilitate read-modify-write support in a victim cache17 Sep 2026US 2026/0277825 A1
Most cited
By later US patents
- Interleave memory controller with a common access queue240US 5,701,434 AHitachi, Ltd. · 1997
- Method and apparatus for arbitrating between command streams229US 6,092,158 AIntel Corporation · 2000
- System and method for managing the execution of memory commands in a solid-state memory185US 8,725,931 B1Western Digital Technologies, Inc. · 2014
- Method and apparatus for dynamic arbitration between a first queue and a second queue based on a high priority transaction type164US 6,629,220 B1Intel Corporation · 2003
- System for flushing queued memory write request corresponding to a queued read request and all prior write requests with counter indicating requests to be flushed159US 5,948,081 ACompaq Computer Corporation · 1999