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US 12,748,620 B2Granted
Dynamic memory power capping with criticality awareness
AssigneeAdvanced Micro Devices, Inc.
InventorYasuko Eckert
Life of this patent
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Abstract
Systems, apparatuses, and methods for reducing memory power consumption without substantial performance impact by selectively delaying non-critical memory requests are disclosed. A system management unit transfers an amount of power allocated from a memory subsystem to other component(s) responsive to detecting a first condition. In one embodiment, the first condition is detecting one or more processors having tasks to execute. In response to the system management unit transferring the amount of power from the memory subsystem to one or more processors, a memory controller delays non-critical memory requests while performing critical memory requests to memory.
Claims20
A system comprising:
- power management circuitry configured to allocate power budgets to components within the system;
- a memory controller comprising:
- a pending queue comprising circuitry configured to store critical memory requests and non-critical memory requests;
- and
- circuitry configured to convey an indication of a number of memory requests stored in the pending queue that are critical:
- one or more processors comprising circuitry configured to generate memory requests targeting a memory coupled to the memory controller;
- and
- a system management unit comprising circuitry configured to:
- receive an indication of memory bandwidth utilization;
- and
- receive the indication of the number of memory requests stored in the pending queue that are critical;
- and
- remove a portion of a power budget currently allocated to a memory subsystem and re-allocate at least some of the portion of the power budget removed from the memory subsystem to the one or more processors, responsive to detection of a power budget re-allocation condition that is based at least in part on the indication of memory bandwidth utilization and the number of memory requests stored in the pending queue that are critical is less than a threshold;
- wherein responsive to re-allocation of the at least some of the portion of the power budget removed from the memory subsystem to the one or more processors, the memory controller is configured to delay non-critical memory requests received from the one or more processors while performing critical memory requests to the memory.
11 more elements
A method comprising:
- allocating, by power management circuitry, power budgets to components within a system;
- storing, by a memory controller, critical memory requests and non-critical memory requests in a pending queue;
- conveying, by circuitry of the memory controller, an indication of a number of memory requests stored in the pending queue that are critical;
- generating, by one or more processors comprising circuitry, memory requests targeting a memory coupled to the memory controller;
- receiving, by a system management unit comprising circuitry, an indication of memory bandwidth utilization;
- receiving, by the system management unit, the indication of the number of memory requests stored in the pending queue that are critical;
- responsive to a re-allocation condition, removing, by the system management unit comprising circuitry, a portion of a power budget currently allocated to a memory subsystem and re-allocate at least some of the portion of the power budget removed from the memory subsystem to the one or more processors, responsive to detection of a power budget re-allocation condition that is based at least in part on the indication of memory bandwidth utilization and the number of memory requests stored in the pending queue that are critical is less than a threshold;
- and
- responsive to re-allocation of the at least some of the portion of the power budget removed from the memory subsystem the one or more processors, delaying, by the memory controller, non-critical memory requests received from the one or more processors while performing critical memory requests to the memory.
6 more elements
An apparatus comprising:
- power management circuitry configured to allocate power budgets to components within the system;
- a memory controller comprising:
- a pending queue comprising circuitry configured to store critical memory requests and non-critical memory requests;
- and
- circuitry configured to convey an indication of a number of memory requests stored in the pending queue that are critical;
- and
- a system management unit comprising circuitry;
- wherein the system management unit circuitry is configured to:
- receive an indication of memory bandwidth utilization;
- and
- receive the indication of the number of memory requests stored in the pending queue that are critical;
- remove a portion of a power budget currently allocated to a memory subsystem and re-allocate at least some of the portion of the power budget removed from the memory subsystem to one or more processors, responsive to detection of a power budget re-allocation condition that is based at least in part on the indication of memory bandwidth utilization and the number of memory requests stored in the pending queue that are critical is less than a threshold;
- and
- wherein responsive to re-allocation of the at least some of the portion of the power budget removed from the memory subsystem to one or more processors, the memory controller comprises circuitry configured to delay non-critical memory requests while performing critical memory requests to the memory.
11 more elements
Dependencies are inferred from the claim text.