Data storage device and operation method thereof

Abstract

A data storage device includes an address estimating circuit configured to generate a start logical address and a request size corresponding to the start logical address from an input logical address corresponding to a write request; an address allocating circuit configured to allocate a target physical address corresponding to the input logical address by using the start logical address, the request size, and the input logical address; and a read queue storing a read command to be provided to a memory device, wherein the address estimating circuit estimates the start logical address considering a probability of the start logical address coexisting in the read queue with the input logical address.

Dependencies are inferred from the claim text.