G06F 12/0888
Using selective caching
Official title: using selective caching, e.g. bypass
G06F12/0888 (Using selective caching) appears on 1,673 US grants and 1,601 published applications in this corpus.
Search patents in G06F- Granted patents
- 1,673
- Published applications
- 1,601
- Assignees
- 367
- Inventors
- 3,368
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 1 | 0 |
| 1981 | 0 | 0 |
| 1982 | 1 | 0 |
| 1983 | 1 | 0 |
| 1984 | 4 | 0 |
| 1985 | 3 | 0 |
| 1986 | 2 | 0 |
| 1987 | 1 | 0 |
| 1988 | 2 | 0 |
| 1989 | 5 | 0 |
| 1990 | 3 | 0 |
| 1991 | 3 | 0 |
| 1992 | 10 | 0 |
| 1993 | 10 | 0 |
| 1994 | 9 | 0 |
| 1995 | 16 | 0 |
| 1996 | 16 | 0 |
| 1997 | 18 | 0 |
| 1998 | 23 | 0 |
| 1999 | 15 | 0 |
| 2000 | 15 | 0 |
| 2001 | 26 | 2 |
| 2002 | 27 | 19 |
| 2003 | 23 | 21 |
| 2004 | 19 | 23 |
| 2005 | 18 | 29 |
| 2006 | 25 | 34 |
| 2007 | 16 | 30 |
| 2008 | 32 | 24 |
| 2009 | 21 | 43 |
| 2010 | 23 | 36 |
| 2011 | 24 | 22 |
| 2012 | 35 | 49 |
| 2013 | 42 | 53 |
| 2014 | 53 | 73 |
| 2015 | 79 | 85 |
| 2016 | 95 | 67 |
| 2017 | 74 | 105 |
| 2018 | 93 | 67 |
| 2019 | 98 | 121 |
| 2020 | 108 | 111 |
| 2021 | 103 | 93 |
| 2022 | 85 | 112 |
| 2023 | 102 | 118 |
| 2024 | 123 | 121 |
| 2025 | 115 | 95 |
| 2026 | 55 | 48 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Cache structure and utilization6 Oct 2026US 12,754,876 B2Intel Corporation
- Systems and methods for updating memory side caches in a multi-GPU configuration15 Sep 2026US 12,737,317 B2Intel Corporation
- Cache structure and utilization15 Sep 2026US 12,737,318 B2Intel Corporation
- System and method of inter/intra-memory tiering25 Aug 2026US 12,717,485 B2Samsung Electronics Co., Ltd.
- Accelerating storage I/O operations using cached data querying25 Aug 2026US 12,717,713 B2Everpure, Inc.
- Reduced data stored in intent logs of storage systems1 Oct 2026US 2026/0300095 A1VDURA, Inc.
- Methods and apparatus for eviction in dual datapath victim cache system1 Oct 2026US 2026/0300187 A1
- Memory pipeline control in a hierarchical memory system17 Sep 2026US 2026/0277811 A1
- Methods and apparatus to facilitate read-modify-write support in a victim cache17 Sep 2026US 2026/0277825 A1
- Merging data for write allocate10 Sep 2026US 2026/0267679 A1
Most cited
By later US patents
- Memory address space determination using programmable limit registers with single-ended comparators489US 5,210,850 ACompaq Computer Corporation · 1993
- Method and apparatus for caching a media stream222US 6,463,508 B1International Business Machines Corporation · 2002
- Low-overhead operating systems177US 8,327,187 B1Tilera Corporation · 2012
- Cache buffered memory subsystem167US 4,476,526 AStorage Technology Corporation · 1984
- Online search system, method and computer program164US 8,452,745 B2Affle Holdings Pte. Ltd. · 2013